Re: [Qemu-ppc] [PATCH 7/7] target/ppc: Use non-arithmetic conversions for fp load/store

[David Gibson]

On Thu, Jul 05, 2018 at 12:51:00PM -0400, Programmingkid wrote:
> 
> > On Jul 5, 2018, at 12:48 PM, Richard Henderson <address@hidden> wrote:
> > 
> > On 07/05/2018 09:31 AM, Programmingkid wrote:
> >>> On Jul 3, 2018, at 11:17 AM, Richard Henderson <address@hidden> wrote:
> >>> 
> >>> Memory operations have no side effects on fp state.
> >>> The use of a "real" conversions between float64 and float32
> >>> would raise exceptions for SNaN and out-of-range inputs.
> >> 
> >> Would you have any documentation that tells us about converting
> >> between 64 bit and 32 bit floating points?
> > 
> > Spelled out right at the beginning of sections 4.6 (load) and 4.7 (store) of
> > Book 1 of the Power ISA manual (version 3.0B) [0].
> > 
> > I've double-checked vs RISU[1] testing of LFS and STFS, with master traces
> > generated on Power 8 ppc64le, so I don't see anything immediately wrong with
> > the patch.  But I haven't had time to look further than that.
> > 
> > 
> > r~
> > 
> > 
> > [0] https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0
> > [1] https://git.linaro.org/people/peter.maydell/risu.git
> 
> Thank you for the documentation. My guess is there are differences
> between the PowerPC and Power 8 implementations.

That seems very, very unlikely to me.

> PowerPC is big
> endian. Would you be able to do your testing again with your Power 8
> CPU in big endian mode?
> 
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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