[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 14/28] mos6522: remove additional interrupt flag filter
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 14/28] mos6522: remove additional interrupt flag filter from mos6522_update_irq() |
Date: |
Mon, 18 Jun 2018 13:53:10 +1000 |
From: Mark Cave-Ayland <address@hidden>
The datasheet indicates that the interrupt is generated by ANDing the
interrupt flags register (IFR) with the interrupt enable register (IER)
but currently there is an extra filter for the SR and timer interrupts.
Remove this extra filter to allow interrupts to be generated by external
inputs on bits 1 and 2 of ports A and B.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/misc/mos6522.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index ad5041d8c0..8d5b419825 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -40,7 +40,7 @@ static void mos6522_timer_update(MOS6522State *s,
MOS6522Timer *ti,
static void mos6522_update_irq(MOS6522State *s)
{
- if (s->ifr & s->ier & (SR_INT | T1_INT | T2_INT)) {
+ if (s->ifr & s->ier) {
qemu_irq_raise(s->irq);
} else {
qemu_irq_lower(s->irq);
--
2.17.1
- [Qemu-ppc] [PULL 00/28] ppc-for-3.0 queue 20180618, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 04/28] spapr: fix leak in h_client_architecture_support(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 03/28] target/ppc: drop empty #if/#endif block, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 02/28] ppc/spapr_caps: Don't disable cap_cfpc on POWER8 by default, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 01/28] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 13/28] mos6522: only clear the shift register interrupt upon write, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 08/28] mac_newworld: wire up programmer switch to NMI handler, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 09/28] adb: fix read reg 3 byte ordering, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 26/28] ppc/pnv: introduce a pnv_chip_core_realize() routine, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 14/28] mos6522: remove additional interrupt flag filter from mos6522_update_irq(),
David Gibson <=
- [Qemu-ppc] [PULL 20/28] pnv: Clean up cpu realize path, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 15/28] mos6522: expose mos6522_update_irq() through MOS6522DeviceClass, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 16/28] sm501: Do not clear read only bits when writing registers, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 18/28] pnv: Fix some error handling cpu realize(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 19/28] pnv_core: Allocate cpu thread objects individually, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 10/28] adb: add property to disable direct reg 3 writes, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 05/28] ppc: introduce Core99MachinesState for the mac99 machine, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 22/28] spapr_cpu_core: convert last snprintf() to g_strdup_printf(), David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 27/28] target/ppc, spapr: Move VPA information to machine_data, David Gibson, 2018/06/17
- [Qemu-ppc] [PULL 06/28] mac_newworld: add via machine option to control mac99 VIA/ADB configuration, David Gibson, 2018/06/17