Re: [Qemu-ppc] [PATCH] target/ppc: Fix reserved bit mask of dstst instruction

[BALATON Zoltan]

On Mon, 26 Mar 2018, David Gibson wrote:
> On Mon, Mar 26, 2018 at 01:54:28AM +0200, BALATON Zoltan wrote:
> > According to the Vector/SIMD extension documentation bit 6 that is
> > currently masked is valid (listed as transient bit) but bits 7 and 8
> > should be reserved instead. Fix the mask to match this.
>
> What document can I find information on dstst in?  The ISA documents I
> have handy are either too early (the instruction didn't exist yet) or
> too late (the instruction was considered obsolete and no details are
> given).

I've found it in "PowerPC Microprocessor Family: Vector/SIMD Multimedia 
Extension Technology Programming Environments Manual" Version 2.06 which 
was the first one Google found. According to this document dstst should 
have the same reserved bits as dst.

Regards,
BALATON Zoltan