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Re: [Qemu-ppc] [PULL 03/11] sm501: Add some more unimplemented registers


From: BALATON Zoltan
Subject: Re: [Qemu-ppc] [PULL 03/11] sm501: Add some more unimplemented registers
Date: Fri, 19 Jan 2018 02:44:58 +0100 (CET)
User-agent: Alpine 2.21 (BSF 202 2017-01-01)

On Thu, 18 Jan 2018, Peter Maydell wrote:
On 11 January 2018 at 04:59, David Gibson <address@hidden> wrote:
From: BALATON Zoltan <address@hidden>

These are not really implemented (just return zero or default values)
but add these so guests accessing them can run.

Signed-off-by: BALATON Zoltan <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
 hw/display/sm501.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index b9b611131e..4f7dc59b25 100644
--- a/hw/display/sm501.c
+++ b/hw/display/sm501.c
@@ -795,6 +795,8 @@ static uint64_t sm501_system_config_read(void *opaque, 
hwaddr addr,
     case SM501_ARBTRTN_CONTROL:
         ret = s->arbitration_control;
         break;
+    case SM501_COMMAND_LIST_STATUS:
+        ret = 0x00180002; /* FIFOs are empty, everything idle */
     case SM501_IRQ_MASK:
         ret = s->irq_mask;
         break;

Is this new case missing a "break;" statement? Coverity points
out that we fall through and overwrite the previous assignment
to 'ret' (CID 1385154).

Oops, stupid mistake. Indeed, Coverity is right, fall through is not intended here. Sent a patch, thank you for spotting it.

Regards,
BALATON Zoltan



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