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Re: [Qemu-ppc] [PATCH RFC] spapr: ignore interrupts during reset state


From: Nikunj A Dadhania
Subject: Re: [Qemu-ppc] [PATCH RFC] spapr: ignore interrupts during reset state
Date: Thu, 13 Jul 2017 14:57:55 +0530

Nikunj A Dadhania <address@hidden> writes:

> Cédric Le Goater <address@hidden> writes:
>
>> On 07/13/2017 09:55 AM, Nikunj A Dadhania wrote:
>>> Cédric Le Goater <address@hidden> writes:
>>> 
>>>>>> How about the following, we do not report work until MSR_EE is disabled:
>>>>>
>>>>> With this fix, I could test the XIVE<->XICS transitions at reboot 
>>>>> under TCG. However, the second boot is very slow for some reason. 
>>>>
>>>> hmm, I am not sure this is related but I just got : 
>>> 
>>> Havent seen in my setup after around 10 reboot cycles, I was using 2
>>> cores pseries setup. Lets give it some more testing. When did this
>>> happen, during boot ?
>>
>> yes. 
>>
>> I could not reproduce either :/ but I am keeping the patch. qemu runs
>> with :
>>
>> -m 2G -M pseries -accel tcg,thread=multi -cpu POWER9 -smp cores=4,maxcpus=8 
>> -realtime mlock=off -kernel ./vmlinux-4.12.0+ -initrd ./initrd.img-4.12.0+ 
>> -append 'console=hvc0 dyndbg="file arch/powerpc/sysdev/xive/* +p"' 
>> -nographic -nodefaults -serial mon:stdio -snapshot  -d guest_errors,unimp 
>> -no-shutdown
>>
>
> With 4 cores I am seeing hangs occasionally, although I havent seen a
> crash. But seems to be similar problem that you had seen.

Can you try this one, localized patch, only taking care of DECR
interrupt. I am not seeing the hangs with this one.

diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
index 783bf98..07e405f 100644
--- a/target/ppc/translate_init.c
+++ b/target/ppc/translate_init.c
@@ -8536,7 +8536,7 @@ static bool cpu_has_work_POWER7(CPUState *cs)
         }
         if ((env->pending_interrupts & (1u << PPC_INTERRUPT_DECR)) &&
             (env->spr[SPR_LPCR] & LPCR_P7_PECE1)) {
-            return true;
+            return msr_ee ? true : false;
         }
         if ((env->pending_interrupts & (1u << PPC_INTERRUPT_MCK)) &&
             (env->spr[SPR_LPCR] & LPCR_P7_PECE2)) {
@@ -8693,7 +8693,7 @@ static bool cpu_has_work_POWER8(CPUState *cs)
         }
         if ((env->pending_interrupts & (1u << PPC_INTERRUPT_DECR)) &&
             (env->spr[SPR_LPCR] & LPCR_P8_PECE3)) {
-            return true;
+            return msr_ee ? true : false;
         }
         if ((env->pending_interrupts & (1u << PPC_INTERRUPT_MCK)) &&
             (env->spr[SPR_LPCR] & LPCR_P8_PECE4)) {
@@ -8876,7 +8876,7 @@ static bool cpu_has_work_POWER9(CPUState *cs)
         /* Decrementer Exception */
         if ((env->pending_interrupts & (1u << PPC_INTERRUPT_DECR)) &&
             (env->spr[SPR_LPCR] & LPCR_DEE)) {
-            return true;
+            return msr_ee ? true : false;
         }
         /* Machine Check or Hypervisor Maintenance Exception */
         if ((env->pending_interrupts & (1u << PPC_INTERRUPT_MCK |







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