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Re: [Qemu-ppc] [QEMU-ppc for-2.10][PATCH V6 0/5] target/ppc: Implement P


From: David Gibson
Subject: Re: [Qemu-ppc] [QEMU-ppc for-2.10][PATCH V6 0/5] target/ppc: Implement POWER9 pseries TCG RADIX Support
Date: Wed, 3 May 2017 15:11:20 +1000
User-agent: Mutt/1.8.0 (2017-02-23)

On Tue, May 02, 2017 at 04:37:13PM +1000, Suraj Jitindar Singh wrote:
> This is V6 of the patch set to implement radix tcg support for a pseries
> guest under a POWER9 cpu model.

I've merged 1-3.  4/5 is more complex, so I still need to review that.

> 
> The main changes since the previous version are:
>  - Use the generic set_spr function in spapr_hcalls.c to set the LPCR value
>    on all cpus rather than implementing our own
> 
> Suraj Jitindar Singh (5):
>   target/ppc: Set UPRT and GTSE on all cpus in H_REGISTER_PROCESS_TABLE
>   target/ppc: Update tlbie to check privilege level based on GTSE
>   target/ppc: Change tlbie invalid fields for POWER9 support
>   target/ppc: Implement ISA V3.00 radix page fault handler
>   target/ppc: Enable RADIX mmu mode for pseries TCG guest
> 
>  hw/ppc/spapr.c              |  15 ++-
>  hw/ppc/spapr_hcall.c        |  18 ++-
>  target/ppc/Makefile.objs    |   1 +
>  target/ppc/cpu.h            |   2 +
>  target/ppc/mmu-book3s-v3.c  |   6 +-
>  target/ppc/mmu-book3s-v3.h  |   5 +
>  target/ppc/mmu-radix64.c    | 259 
> ++++++++++++++++++++++++++++++++++++++++++++
>  target/ppc/mmu-radix64.h    |  71 ++++++++++++
>  target/ppc/translate.c      |  11 +-
>  target/ppc/translate_init.c |   2 +-
>  10 files changed, 369 insertions(+), 21 deletions(-)
>  create mode 100644 target/ppc/mmu-radix64.c
>  create mode 100644 target/ppc/mmu-radix64.h
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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