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[Qemu-ppc] [PULL 18/48] spapr: move the IRQ server number mapping under
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 18/48] spapr: move the IRQ server number mapping under the machine |
Date: |
Wed, 26 Apr 2017 17:00:04 +1000 |
From: Cédric Le Goater <address@hidden>
This is the second step to abstract the IRQ 'server' number of the
XICS layer. Now that the prereq cleanups have been done in the
previous patch, we can move down the 'cpu_dt_id' to 'cpu_index'
mapping in the sPAPR machine handler.
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xics_spapr.c | 5 ++---
hw/ppc/spapr.c | 3 ++-
hw/ppc/spapr_cpu_core.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 58f100d..f05308b8 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -52,9 +52,8 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState
*spapr,
static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
- target_ulong server = xics_get_cpu_index_by_dt_id(args[0]);
target_ulong mfrr = args[1];
- ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), server);
+ ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), args[0]);
if (!icp) {
return H_PARAMETER;
@@ -122,7 +121,7 @@ static void rtas_set_xive(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
}
nr = rtas_ld(args, 0);
- server = xics_get_cpu_index_by_dt_id(rtas_ld(args, 1));
+ server = rtas_ld(args, 1);
priority = rtas_ld(args, 2);
if (!ics_valid_irq(ics, nr) || !xics_icp_get(XICS_FABRIC(spapr), server)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 8749f1b..08f8615 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3112,9 +3112,10 @@ static void spapr_ics_resend(XICSFabric *dev)
ics_resend(spapr->ics);
}
-static ICPState *spapr_icp_get(XICSFabric *xi, int server)
+static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id)
{
sPAPRMachineState *spapr = SPAPR_MACHINE(xi);
+ int server = xics_get_cpu_index_by_dt_id(cpu_dt_id);
return (server < spapr->nr_servers) ? &spapr->icps[server] : NULL;
}
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 7db61bd..4e1a995 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -64,7 +64,7 @@ static void spapr_cpu_init(sPAPRMachineState *spapr,
PowerPCCPU *cpu,
{
CPUPPCState *env = &cpu->env;
XICSFabric *xi = XICS_FABRIC(spapr);
- ICPState *icp = xics_icp_get(xi, CPU(cpu)->cpu_index);
+ ICPState *icp = xics_icp_get(xi, cpu->cpu_dt_id);
/* Set time-base frequency to 512 MHz */
cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
--
2.9.3
- [Qemu-ppc] [PULL 36/48] ppc/pnv: Add support for POWER8+ LPC Controller, (continued)
- [Qemu-ppc] [PULL 36/48] ppc/pnv: Add support for POWER8+ LPC Controller, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 30/48] ipmi: use a file to load SDRs, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 34/48] target/ppc: Fix size of struct PPCElfPrstatus, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 43/48] ppc/pnv: generate an OEM SEL event on shutdown, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 26/48] ppc/pnv: add memory regions for the ICP registers, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 27/48] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 42/48] ppc/pnv: add initial IPMI sensors for the BMC simulator, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 33/48] ipmi: introduce an ipmi_bmc_gen_event() API, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 46/48] e500, book3s: mfspr 259: Register mapped/aliased SPRG3 user read, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 47/48] target/ppc: Style fixes, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 18/48] spapr: move the IRQ server number mapping under the machine,
David Gibson <=
- [Qemu-ppc] [PULL 32/48] ipmi: introduce an ipmi_bmc_sdr_find() API, David Gibson, 2017/04/26
- [Qemu-ppc] [PULL 44/48] spapr-cpu-core: Release ICPState object during CPU unrealization, David Gibson, 2017/04/26
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/48] ppc-for-2.10 queue 20170426, no-reply, 2017/04/26
- Re: [Qemu-ppc] [PULL 00/48] ppc-for-2.10 queue 20170426, Peter Maydell, 2017/04/26