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Re: [Qemu-ppc] MTTCG for ppc64 (removed from ppc-for-2.10)


From: Richard Henderson
Subject: Re: [Qemu-ppc] MTTCG for ppc64 (removed from ppc-for-2.10)
Date: Fri, 21 Apr 2017 00:41:12 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0

On 04/21/2017 12:08 AM, Nikunj A Dadhania wrote:
David Gibson <address@hidden> writes:

[ Unknown signature status ]
Hi all,

I'm afraid I've pulled the MTTCG enablement patches for target/ppc64
out of my ppc-for-2.10 tree, since I discovered it was causing a
repeatable failure on one of the Travis builds.

Specifically, with both the LL/SC in terms of cmpxchg and
enable-mttcg-by-default patches applied, and qemu build with clang,
then make check will fail with a tcg_abort() in the powernv
boot-serial test.

I see that in temp_load(), ts->val_type is ending up being
TEMP_VAL_DEAD, and the tcg_abort() is because of that.

Following patch gets past this error...

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 4a1f24a..9a4ea5f 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -3169,6 +3169,7 @@ static void gen_conditional_store(DisasContext *ctx, TCGv 
EA,
     tcg_gen_brcond_tl(TCG_COND_NE, EA, cpu_reserve, l1);

     t0 = tcg_temp_new();
+    tcg_gen_movi_tl(t0, 0);
     tcg_gen_atomic_cmpxchg_tl(t0, cpu_reserve, cpu_reserve_val,
                               cpu_gpr[reg], ctx->mem_idx,
                               DEF_MEMOP(memop) | MO_ALIGN);

This *shouldn't* change anything. The arugument that you're initializing is pure output and is equivalent to

        t0 = 0;
        t0 = foo();

What's the test case here?


r~



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