Re: [Qemu-ppc] [QEMU-ppc for-2.10][PATCH V4 6/6] target/ppc: Enable RADIX mmu mode for pseries TCG guest

[David Gibson]

On Thu, Apr 13, 2017 at 04:02:40PM +1000, Suraj Jitindar Singh wrote:
> Now that we have added all the infrastructure we can enable a pseries TCG
> guest to use radix.
> 
> In order to do this we have to add the appropriate bits to the
> ibm,arch-vec-5-platform-support vector to represent that we support both
> hash and radix mmu models.
> 
> A radix guest can now be booted in pseries tcg mode by specifying:
> -cpu POWER9
> 
> Note that we assume hash, that is we allocate a hpt, until a guest tells
> us otherwise via a H_REGISTER_PROCESS_TABLE call with radix specified - in
> which case we free the hpt. If we were right and the guest is hash then
> there's nothing for us to do.
> 
> Signed-off-by: Suraj Jitindar Singh <address@hidden>

Reviewed-by: David Gibson <address@hidden>

> 
> ---
> 
> V2 -> V3:
> 
> - Reword commit message and comments
> - Assume a hash guest until H_REGISTER_PROCESS_TABLE called with radix
>   specified.
> ---
>  hw/ppc/spapr.c | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 0e1c29b..f0b99a9 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -882,6 +882,8 @@ static void spapr_dt_rtas(sPAPRMachineState *spapr, void 
> *fdt)
>   * option vector 5: */
>  static void spapr_dt_ov5_platform_support(void *fdt, int chosen)
>  {
> +    PowerPCCPU *first_ppc_cpu = POWERPC_CPU(first_cpu);
> +
>      char val[2 * 3] = {
>          24, 0x00, /* Hash/Radix, filled in below. */
>          25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
> @@ -897,8 +899,13 @@ static void spapr_dt_ov5_platform_support(void *fdt, int 
> chosen)
>              val[1] = 0x00; /* Hash */
>          }
>      } else {
> -        /* TODO: TCG case, hash */
> -        val[1] = 0x00;
> +        if (first_ppc_cpu->env.mmu_model & POWERPC_MMU_V3) {
> +            /* V3 MMU supports both hash and radix (with dynamic switching) 
> */
> +            val[1] = 0xC0;
> +        } else {
> +            /* Otherwise we can only do hash */
> +            val[1] = 0x00;
> +        }
>      }
>      _FDT(fdt_setprop(fdt, chosen, "ibm,arch-vec-5-platform-support",
>                       val, sizeof(val)));
> @@ -2128,8 +2135,8 @@ static void ppc_spapr_init(MachineState *machine)
>      }
>  
>      spapr_ovec_set(spapr->ov5, OV5_FORM1_AFFINITY);
> -    if (kvmppc_has_cap_mmu_radix()) {
> -        /* KVM always allows GTSE with radix... */
> +    if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) {
> +        /* KVM and TCG always allow GTSE with radix... */
>          spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE);
>      }
>      /* ... but not with hash (currently). */

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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