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Re: [Qemu-ppc] [PATCH 0/3] target/ppc: floating point multiply-add fixes
From: |
Nikunj Dadhania |
Subject: |
Re: [Qemu-ppc] [PATCH 0/3] target/ppc: floating point multiply-add fixes |
Date: |
Sun, 5 Mar 2017 18:12:29 +0530 |
On 5 March 2017 at 11:33, Programmingkid <address@hidden> wrote:
>
> On Mar 5, 2017, at 12:27 AM, Nikunj A Dadhania wrote:
>
>> Programmingkid <address@hidden> writes:
>>
>>> On Mar 4, 2017, at 8:53 AM, Nikunj A Dadhania wrote:
>>>
>>>> G 3 <address@hidden> writes:
>>>>
>>>>> On Mar 3, 2017, at 4:59 AM, address@hidden wrote:
>>>>>
>>>>> Is there a program that could be used to test the floating point
>>>>> instructions in QEMU for accuracy?
>>>>
>>>> I am not aware of any such program. I do the unit test of the
>>>> instruction and then use risu to verify with either real hardware or
>>>> system simulator.
>>>
>>> risu works on PowerPC?
>>
>> Yes, Ziviani ported it.
>>
>>> https://wiki.linaro.org/PeterMaydell/Risu
>>> This page says its only for ARM.
>>
>> Oh, that page would need updation.
>>
>>
>>> I was thinking about your patches. They comply with ISA 3.0, but do
>>> they comply with older PowerPC chips like the PowerPC 750?
>>
>> We have added older instructions, and its simple to add missing
>> instructions.
>
> This risu program looks really helpful. Would this work for a PowerPC 750?
Not sure if the current support will work out of the box, you will
have to try it out. Check if the instructions that you are interested
in are there in ppc64.risu. Maybe we might need a ppc32.risu.
Regards
Nikunj
- Re: [Qemu-ppc] [PATCH 2/3] target/ppc: fmadd: add macro for updating flags, (continued)