[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-ppc] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries TCG RAD

From: Suraj Jitindar Singh
Subject: [Qemu-ppc] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries TCG RADIX Support
Date: Wed, 1 Mar 2017 18:12:51 +1100

This is V2 of the series to implement support for the new radix mmu model
for a pseries tcg guest. It will allow you to boot a guest in radix mode.

This series is designed to apply on the top of the stack as follows:

The tree can be found here:

Description of the patches:

1-4: Generic clean up/adding checks for hash code which are stand alone
     of the radix implementation support added below
5-10: Support for the new radix mmu and associated H-CALLS, registers,
      instructions and CAS.

Suraj Jitindar Singh (10):
  target/ppc: Add Instruction Authority Mask Register Check
  target/ppc: Add execute permission checking to access authority check
  target/ppc: Move no-execute and guarded page checking into new
  target/ppc: Rework hash mmu page fault code and add defines for
  target/ppc: Add ibm,processor-radix-AP-encodings for TCG
  target/ppc: Add POWER9/ISAv3.00 to compat_table
  target/ppc: Flush TLB on write to PIDR
  target/ppc: Adapt tlbie[l] for ISAv3.00 Support
  target/ppc: Implement ISA V3.00 radix page fault handler
  target/ppc: Enable RADIX for pseries TCG guest

 hw/ppc/spapr.c              |  39 ++++--
 hw/ppc/spapr_hcall.c        |  13 +-
 target/ppc/Makefile.objs    |   1 +
 target/ppc/compat.c         |  16 ++-
 target/ppc/helper.h         |   1 +
 target/ppc/kvm.c            |   2 -
 target/ppc/misc_helper.c    |   8 ++
 target/ppc/mmu-book3s-v3.c  |   6 +-
 target/ppc/mmu-book3s-v3.h  |  22 ++++
 target/ppc/mmu-hash64.c     |  97 +++++++++++----
 target/ppc/mmu-radix64.c    | 289 ++++++++++++++++++++++++++++++++++++++++++++
 target/ppc/mmu-radix64.h    |  73 +++++++++++
 target/ppc/translate.c      |   4 +-
 target/ppc/translate_init.c |  10 +-
 14 files changed, 523 insertions(+), 58 deletions(-)
 create mode 100644 target/ppc/mmu-radix64.c
 create mode 100644 target/ppc/mmu-radix64.h


reply via email to

[Prev in Thread] Current Thread [Next in Thread]