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[Qemu-ppc] [PULL 103/107] tcg/POWER9: NOOP the cp_abort instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 103/107] tcg/POWER9: NOOP the cp_abort instruction |
Date: |
Thu, 2 Feb 2017 16:14:41 +1100 |
From: Suraj Jitindar Singh <address@hidden>
The cp_abort instruction is used to remove the state of an in progress
copy paste sequence. POWER9 compilers add this in various places, such
as context switches which causes illegal instruction signals since we
don't yet implement this instruction.
Given there is no implementation of the copy paste facility and that we
don't claim to support it, we can just noop this instruction.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 5934185..b48abae 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -6020,6 +6020,10 @@ GEN_TM_NOOP(tabortwci);
GEN_TM_NOOP(tabortdc);
GEN_TM_NOOP(tabortdci);
GEN_TM_NOOP(tsr);
+static inline void gen_cp_abort(DisasContext *ctx)
+{
+ // Do Nothing
+}
static void gen_tcheck(DisasContext *ctx)
{
@@ -6170,6 +6174,7 @@ GEN_HANDLER2(andi_, "andi.", 0x1C, 0xFF, 0xFF,
0x00000000, PPC_INTEGER),
GEN_HANDLER2(andis_, "andis.", 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),
GEN_HANDLER(cntlzw, 0x1F, 0x1A, 0x00, 0x00000000, PPC_INTEGER),
GEN_HANDLER_E(cnttzw, 0x1F, 0x1A, 0x10, 0x00000000, PPC_NONE, PPC2_ISA300),
+GEN_HANDLER_E(cp_abort, 0x1F, 0x06, 0x1A, 0x03FFF801, PPC_NONE, PPC2_ISA300),
GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER),
GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER),
GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),
--
2.9.3
- [Qemu-ppc] [PULL 055/107] target-ppc: Use correct precision for FPRF setting, (continued)
- [Qemu-ppc] [PULL 055/107] target-ppc: Use correct precision for FPRF setting, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 073/107] ppc: Implement bcdus. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 096/107] target/ppc: Remove unused POWERPC_FAMILY(POWER), David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 072/107] ppc: Implement bcds. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 097/107] target/ppc/cpu-models: Fix/remove bad CPU aliases, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 093/107] target/ppc: Add pcr_supported to POWER9 cpu class definition, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 098/107] ppc: switch to constants within BUILD_BUG_ON, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 105/107] target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 107/107] hw/ppc/pnv: Use error_report instead of hw_error if a ROM file can't be found, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 057/107] target-ppc: Add xsxexpqp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 103/107] tcg/POWER9: NOOP the cp_abort instruction,
David Gibson <=
- [Qemu-ppc] [PULL 060/107] pxb: Restrict to x86, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 075/107] target-ppc: Add xsiexpdp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 062/107] ppc: Add ppc_set_compat_all(), David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 099/107] target-ppc: Add MMU model check for booke machines, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 094/107] ppc: Remove unused function cpu_ppc601_rtc_init(), David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 087/107] target-ppc: Use ppc_vsr_t.f128 in xscmp[o, u, exp]qp, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 079/107] target-ppc: Add xvxexpsp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 053/107] target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 074/107] ppc: Implement bcdsr. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 092/107] powerpc/cpu-models: rename ISAv3.00 logical PVR definition, David Gibson, 2017/02/02