[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PATCH v6 0/2] POWER9 TCG enablements - BCD functions - final
From: |
Jose Ricardo Ziviani |
Subject: |
[Qemu-ppc] [PATCH v6 0/2] POWER9 TCG enablements - BCD functions - final part |
Date: |
Thu, 12 Jan 2017 18:08:31 -0200 |
v6:
- improves bcdtrunc/bcdutrunc overflow comparison
- removes bcds/bcdus/bcdsr applied patches
v5:
- removes 'unlikely' gcc branch pred. hints from not unlikely places
- adds comments in host-utils functions
- adds more test cases for shift functions
- handles "shift backwards" with signed shifts
- rebases branch
v4:
- improves functions to behave exactly like the target
v3:
- moves shift functions to host-utils.c and added config_int128 guard
- changes Makefile to always compile host-utils.c
- redesigns bcd[u]trunc to use bitwise operations
- removes "target-ppc: Implement bcd_is_valid function" (merged)
v2:
- bcd[s,sr,us] uses 1 byte for shifting instead of 4 bytes
- left/right functions in host-utils are out of CONFIG_INT128
- fixes overflowing issue in left shift and added a testcase
This serie contains 5 new instructions for POWER9 ISA3.0, left/right shifts for
unsigned quadwords and a small improvement to check whether a bcd value is
valid or not.
bcdtrunc.: Decimal signed trucate
bcdutrunc.: Decimal unsigned truncate
Jose Ricardo Ziviani (2):
ppc: Implement bcdtrunc. instruction
ppc: Implement bcdutrunc. instruction
target/ppc/helper.h | 2 +
target/ppc/int_helper.c | 88 +++++++++++++++++++++++++++++++++++++
target/ppc/translate/vmx-impl.inc.c | 9 ++++
target/ppc/translate/vmx-ops.inc.c | 6 +--
4 files changed, 102 insertions(+), 3 deletions(-)
--
2.7.4
- [Qemu-ppc] [PATCH v6 0/2] POWER9 TCG enablements - BCD functions - final part,
Jose Ricardo Ziviani <=