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[Qemu-ppc] [PULL 29/67] target-ppc: implement stxvl instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 29/67] target-ppc: implement stxvl instruction |
Date: |
Thu, 12 Jan 2017 13:02:49 +1100 |
From: Nikunj A Dadhania <address@hidden>
stxvl: Store VSX Vector with Length
Vector (8-bit elements) in BE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
Vector (8-bit elements) in LE:
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
|00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
Storing 14 bytes would result in following Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/helper.h | 1 +
target/ppc/mem_helper.c | 29 +++++++++++++++++++++++++++++
target/ppc/translate/vsx-impl.inc.c | 1 +
target/ppc/translate/vsx-ops.inc.c | 3 +++
4 files changed, 34 insertions(+)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 6c44731..211313d 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -320,6 +320,7 @@ DEF_HELPER_3(stvewx, void, env, avr, tl)
#if defined(TARGET_PPC64)
DEF_HELPER_4(lxvl, void, env, tl, tl, tl)
DEF_HELPER_4(lxvll, void, env, tl, tl, tl)
+DEF_HELPER_4(stxvl, void, env, tl, tl, tl)
#endif
DEF_HELPER_4(vsumsws, void, env, avr, avr, avr)
DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr)
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index da51465..2427b49 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -317,6 +317,35 @@ void helper_##name(CPUPPCState *env, target_ulong addr,
\
VSX_LXVL(lxvl, 0)
VSX_LXVL(lxvll, 1)
#undef VSX_LXVL
+
+#define VSX_STXVL(name, lj) \
+void helper_##name(CPUPPCState *env, target_ulong addr, \
+ target_ulong xt_num, target_ulong rb) \
+{ \
+ int i; \
+ ppc_vsr_t xt; \
+ target_ulong nb = GET_NB(rb); \
+ \
+ if (!nb) { \
+ return; \
+ } \
+ getVSR(xt_num, &xt, env); \
+ nb = (nb >= 16) ? 16 : nb; \
+ if (msr_le && !lj) { \
+ for (i = 16; i > 16 - nb; i--) { \
+ cpu_stb_data_ra(env, addr, xt.VsrB(i - 1), GETPC()); \
+ addr = addr_add(env, addr, 1); \
+ } \
+ } else { \
+ for (i = 0; i < nb; i++) { \
+ cpu_stb_data_ra(env, addr, xt.VsrB(i), GETPC()); \
+ addr = addr_add(env, addr, 1); \
+ } \
+ } \
+}
+
+VSX_STXVL(stxvl, 0)
+#undef VSX_STXVL
#undef GET_NB
#endif /* TARGET_PPC64 */
diff --git a/target/ppc/translate/vsx-impl.inc.c
b/target/ppc/translate/vsx-impl.inc.c
index ce20579..5099d44 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -268,6 +268,7 @@ static void gen_##name(DisasContext *ctx)
\
VSX_VECTOR_LOAD_STORE_LENGTH(lxvl)
VSX_VECTOR_LOAD_STORE_LENGTH(lxvll)
+VSX_VECTOR_LOAD_STORE_LENGTH(stxvl)
#endif
#define VSX_LOAD_SCALAR_DS(name, operation) \
diff --git a/target/ppc/translate/vsx-ops.inc.c
b/target/ppc/translate/vsx-ops.inc.c
index c207804..3afded2 100644
--- a/target/ppc/translate/vsx-ops.inc.c
+++ b/target/ppc/translate/vsx-ops.inc.c
@@ -25,6 +25,9 @@ GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE,
PPC2_VSX),
GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE, PPC2_ISA300),
GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300),
GEN_HANDLER_E(stxvx, 0x1F, 0x0C, 0x0C, 0, PPC_NONE, PPC2_ISA300),
+#if defined(TARGET_PPC64)
+GEN_HANDLER_E(stxvl, 0x1F, 0x0D, 0x0C, 0, PPC_NONE, PPC2_ISA300),
+#endif
GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207),
GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207),
--
2.9.3
- [Qemu-ppc] [PULL 21/67] target-ppc: implement stop instruction, (continued)
- [Qemu-ppc] [PULL 21/67] target-ppc: implement stop instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 22/67] target-ppc: implement xsabsqp/xsnabsqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 14/67] target-ppc: add vextu[bhw][lr]x instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 38/67] qtest: add display-vga-test to ppc64, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 35/67] ppc: Rewrite ppc_get_compat_smt_threads(), David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 36/67] ppc: Validate compatibility modes when setting, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 47/67] target-ppc: Add xxinsertw instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 60/67] pxb: Restrict to x86, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 18/67] ppc: Rename cpu_version to compat_pvr, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 20/67] target-ppc: move ppc_vsr_t to common header, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 29/67] target-ppc: implement stxvl instruction,
David Gibson <=
- [Qemu-ppc] [PULL 45/67] hw/ppc: QOM'ify spapr_vio.c, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 32/67] prep: do not use global variable to access nvram, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 40/67] qtest: convert ivshmem-test to use libqos, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 41/67] qtest: add ivshmem-test for ppc64, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 19/67] ppc/spapr: implement H_SIGNAL_SYS_RESET, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 30/67] target-ppc: implement stxvll instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 26/67] target-ppc: Add xxperm and xxpermr instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 46/67] target-ppc: Add xxextractuw instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 67/67] ppc: Fix a warning in bcdcfz code and improve BCD_DIG_BYTE macro, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 52/67] target-ppc: Replace isden by float64_is_zero_or_denormal, David Gibson, 2017/01/11