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[Qemu-ppc] [PULL 13/67] target-ppc: Implement bcdsetsgn. instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 13/67] target-ppc: Implement bcdsetsgn. instruction |
Date: |
Thu, 12 Jan 2017 13:02:33 +1100 |
From: Jose Ricardo Ziviani <address@hidden>
bcdsetsgn.: Decimal set sign. This instruction copies the register
value to the result register but adjust the signal according to
the preferred sign value.
Signed-off-by: Jose Ricardo Ziviani <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/helper.h | 1 +
target/ppc/int_helper.c | 19 +++++++++++++++++++
target/ppc/translate/vmx-impl.inc.c | 8 ++++++++
3 files changed, 28 insertions(+)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 2974101..ac8901f 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -385,6 +385,7 @@ DEF_HELPER_3(bcdctz, i32, avr, avr, i32)
DEF_HELPER_3(bcdcfsq, i32, avr, avr, i32)
DEF_HELPER_3(bcdctsq, i32, avr, avr, i32)
DEF_HELPER_4(bcdcpsgn, i32, avr, avr, avr, i32)
+DEF_HELPER_3(bcdsetsgn, i32, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 8021c48..4259876 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2975,6 +2975,25 @@ uint32_t helper_bcdcpsgn(ppc_avr_t *r, ppc_avr_t *a,
ppc_avr_t *b, uint32_t ps)
return bcd_cmp_zero(r);
}
+uint32_t helper_bcdsetsgn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
+{
+ int i;
+ int invalid = 0;
+ int sgnb = bcd_get_sgn(b);
+
+ *r = *b;
+ bcd_put_digit(r, bcd_preferred_sgn(sgnb, ps), 0);
+
+ for (i = 1; i < 32; i++) {
+ bcd_get_digit(b, i, &invalid);
+ if (unlikely(invalid)) {
+ return CRF_SO;
+ }
+ }
+
+ return bcd_cmp_zero(r);
+}
+
void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
{
int i;
diff --git a/target/ppc/translate/vmx-impl.inc.c
b/target/ppc/translate/vmx-impl.inc.c
index c14b666..b188e60 100644
--- a/target/ppc/translate/vmx-impl.inc.c
+++ b/target/ppc/translate/vmx-impl.inc.c
@@ -991,6 +991,7 @@ GEN_BCD2(bcdcfz)
GEN_BCD2(bcdctz)
GEN_BCD2(bcdcfsq)
GEN_BCD2(bcdctsq)
+GEN_BCD2(bcdsetsgn)
GEN_BCD(bcdcpsgn);
static void gen_xpnd04_1(DisasContext *ctx)
@@ -1014,6 +1015,9 @@ static void gen_xpnd04_1(DisasContext *ctx)
case 7:
gen_bcdcfn(ctx);
break;
+ case 31:
+ gen_bcdsetsgn(ctx);
+ break;
default:
gen_invalid(ctx);
break;
@@ -1038,12 +1042,16 @@ static void gen_xpnd04_2(DisasContext *ctx)
case 7:
gen_bcdcfn(ctx);
break;
+ case 31:
+ gen_bcdsetsgn(ctx);
+ break;
default:
gen_invalid(ctx);
break;
}
}
+
GEN_VXFORM_DUAL(vsubcuw, PPC_ALTIVEC, PPC_NONE, \
xpnd04_1, PPC_NONE, PPC2_ISA300)
GEN_VXFORM_DUAL(vsubsws, PPC_ALTIVEC, PPC_NONE, \
--
2.9.3
- [Qemu-ppc] [PULL 00/67] ppc-for-2.9 queue 20170112, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 04/67] target-ppc: Fix xscmpodp and xscmpudp instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 01/67] disas/ppc: Fix indefinite articles in comments, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 08/67] target-ppc: implement stxsd and stxssp, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 07/67] target-ppc: implement lxsd and lxssp instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 09/67] target-ppc: implement lxv/lxvx and stxv/stxvx, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 24/67] target-ppc: implement xsnegqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 13/67] target-ppc: Implement bcdsetsgn. instruction,
David Gibson <=
- [Qemu-ppc] [PULL 03/67] target-ppc: rename CRF_* defines as CRF_*_BIT, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 06/67] target-ppc: Add xscmpoqp and xscmpuqp instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 05/67] target-ppc: Add xscmpexp[dp, qp] instructions, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 02/67] target-ppc: Consolidate instruction decode helpers, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 15/67] pseries: Always use core objects for CPU construction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 10/67] target-ppc: Implement bcdcfsq. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 23/67] target-ppc: Implement bcd_is_valid function, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 25/67] target-ppc: implement xscpsgnqp instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 11/67] target-ppc: Implement bcdctsq. instruction, David Gibson, 2017/01/11
- [Qemu-ppc] [PULL 33/67] pseries: Add pseries-2.9 machine type, David Gibson, 2017/01/11