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[Qemu-ppc] [PATCH 02/11] softfloat: Fix the default qNAN for target-ppc
From: |
Nikunj A Dadhania |
Subject: |
[Qemu-ppc] [PATCH 02/11] softfloat: Fix the default qNAN for target-ppc |
Date: |
Tue, 10 Jan 2017 14:20:34 +0530 |
From: Bharata B Rao <address@hidden>
Currently float128_default_nan() returns 0xFFFF800000000000 in the
higher double word, but it should return 0x7FFF800000000000 which
is the correct higher double word for default qNAN on PowerPC.
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
---
fpu/softfloat-specialize.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index f5aed72..7228b30 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -181,7 +181,7 @@ float128 float128_default_nan(float_status *status)
r.high = LIT64(0x7FFF7FFFFFFFFFFF);
} else {
r.low = LIT64(0x0000000000000000);
-#if defined(TARGET_S390X)
+#if defined(TARGET_S390X) || defined(TARGET_PPC)
r.high = LIT64(0x7FFF800000000000);
#else
r.high = LIT64(0xFFFF800000000000);
--
2.7.4
- [Qemu-ppc] [PATCH 00/11] POWER9 TCG enablements - part11, Nikunj A Dadhania, 2017/01/10
- [Qemu-ppc] [PATCH 04/11] target-ppc: Add xsiexpqp instruction, Nikunj A Dadhania, 2017/01/10
- [Qemu-ppc] [PATCH 06/11] target-ppc: Add xviexpdp instruction, Nikunj A Dadhania, 2017/01/10
- [Qemu-ppc] [PATCH 05/11] target-ppc: Add xviexpsp instruction, Nikunj A Dadhania, 2017/01/10
- [Qemu-ppc] [PATCH 07/11] target-ppc: Add xvxexpsp instruction, Nikunj A Dadhania, 2017/01/10
- [Qemu-ppc] [PATCH 09/11] target-ppc: Add xvxsigsp instruction, Nikunj A Dadhania, 2017/01/10
- [Qemu-ppc] [PATCH 08/11] target-ppc: Add xvxexpdp instruction, Nikunj A Dadhania, 2017/01/10