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[Qemu-ppc] [PATCH v3 3/4] target-ppc: Implement bcdcfz. instruction
From: |
Jose Ricardo Ziviani |
Subject: |
[Qemu-ppc] [PATCH v3 3/4] target-ppc: Implement bcdcfz. instruction |
Date: |
Mon, 31 Oct 2016 15:34:48 -0200 |
bcdcfz. converts from Zoned numeric format to BCD. Zoned format uses
a byte to represent a digit where the most significant nibble is 0x3
or 0xf, depending on the preferred signal.
Signed-off-by: Jose Ricardo Ziviani <address@hidden>
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 48 +++++++++++++++++++++++++++++++++++++
target-ppc/translate/vmx-impl.inc.c | 7 ++++--
3 files changed, 54 insertions(+), 2 deletions(-)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 33286c6..8546bb9 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -373,6 +373,7 @@ DEF_HELPER_4(bcdadd, i32, avr, avr, avr, i32)
DEF_HELPER_4(bcdsub, i32, avr, avr, avr, i32)
DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
DEF_HELPER_3(bcdctn, i32, avr, avr, i32)
+DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index aaaf642..6581887 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -2727,6 +2727,54 @@ uint32_t helper_bcdctn(ppc_avr_t *r, ppc_avr_t *b,
uint32_t ps)
return cr;
}
+uint32_t helper_bcdcfz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
+{
+ int i;
+ int j;
+ int cr = 0;
+ int invalid = 0;
+ int neq_flag = 0;
+ int zone_digit = 0;
+ int zone_lead = ps ? 0xF : 0x3;
+ int digit = 0;
+ ppc_avr_t ret = { .u64 = { 0, 0 } };
+ int sgnb = b->u8[BCD_DIG_BYTE(0)] >> 4;
+
+ if (unlikely((sgnb < 0xA) && ps)) {
+ invalid = 1;
+ }
+
+ for (i = 0, j = 1; i < 31; i += 2, j++) {
+ zone_digit = (i) ? b->u8[BCD_DIG_BYTE(i)] >> 4 : zone_lead;
+ digit = b->u8[BCD_DIG_BYTE(i)] & 0xF;
+
+ if (unlikely(zone_digit != zone_lead || digit > 0x9)) {
+ invalid = 1;
+ break;
+ }
+
+ neq_flag += (digit != 0);
+ bcd_put_digit(&ret, digit, j);
+ }
+
+ if ((ps && (sgnb == 0xB || sgnb == 0xD)) ||
+ (!ps && (sgnb & 0x4))) {
+ bcd_put_digit(&ret, BCD_NEG_PREF, 0);
+ cr = (neq_flag) ? 1 << CRF_LT : 1 << CRF_EQ;
+ } else {
+ bcd_put_digit(&ret, BCD_PLUS_PREF_1, 0);
+ cr = (neq_flag) ? 1 << CRF_GT : 1 << CRF_EQ;
+ }
+
+ if (unlikely(invalid)) {
+ cr = 1 << CRF_SO;
+ }
+
+ *r = ret;
+
+ return cr;
+}
+
void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
{
int i;
diff --git a/target-ppc/translate/vmx-impl.inc.c
b/target-ppc/translate/vmx-impl.inc.c
index 301088e..ecf0e54 100644
--- a/target-ppc/translate/vmx-impl.inc.c
+++ b/target-ppc/translate/vmx-impl.inc.c
@@ -972,6 +972,7 @@ GEN_BCD(bcdadd)
GEN_BCD(bcdsub)
GEN_BCD2(bcdcfn)
GEN_BCD2(bcdctn)
+GEN_BCD2(bcdcfz)
static void gen_xpnd04_1(DisasContext *ctx)
{
@@ -986,7 +987,8 @@ static void gen_xpnd04_1(DisasContext *ctx)
gen_bcdctn(ctx);
break;
case 6:
- break; /* bcdcfz. */
+ gen_bcdcfz(ctx);
+ break;
case 7:
gen_bcdcfn(ctx);
break;
@@ -1008,7 +1010,8 @@ static void gen_xpnd04_2(DisasContext *ctx)
case 4:
break; /* bcdctz. */
case 6:
- break; /* bcdcfz. */
+ gen_bcdcfz(ctx);
+ break;
case 7:
gen_bcdcfn(ctx);
break;
--
2.7.4