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[Qemu-ppc] [PULL 66/73] target-ppc: Add xvcmpnesp, xvcmpnedp instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 66/73] target-ppc: Add xvcmpnesp, xvcmpnedp instructions |
Date: |
Fri, 28 Oct 2016 12:38:07 +1100 |
From: Swapnil Bokade <address@hidden>
xvcmpnedp[.]: VSX Vector Compare Not Equal Double-Precision
xvcmpnesp[.]: VSX Vector Compare Not Equal Single-Precision
Signed-off-by: Swapnil Bokade <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/fpu_helper.c | 19 +++++++++++--------
target-ppc/helper.h | 2 ++
target-ppc/translate/vsx-impl.inc.c | 2 ++
target-ppc/translate/vsx-ops.inc.c | 2 ++
4 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 4906372..8a389e1 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -2497,8 +2497,9 @@ VSX_MAX_MIN(xvminsp, minnum, 4, float32, VsrW(i))
* fld - vsr_t field (VsrD(*) or VsrW(*))
* cmp - comparison operation
* svxvc - set VXVC bit
+ * exp - expected result of comparison
*/
-#define VSX_CMP(op, nels, tp, fld, cmp, svxvc) \
+#define VSX_CMP(op, nels, tp, fld, cmp, svxvc, exp) \
void helper_##op(CPUPPCState *env, uint32_t opcode) \
{ \
ppc_vsr_t xt, xa, xb; \
@@ -2523,7 +2524,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
xt.fld = 0; \
all_true = 0; \
} else { \
- if (tp##_##cmp(xb.fld, xa.fld, &env->fp_status) == 1) { \
+ if (tp##_##cmp(xb.fld, xa.fld, &env->fp_status) == exp) { \
xt.fld = -1; \
all_false = 0; \
} else { \
@@ -2540,12 +2541,14 @@ void helper_##op(CPUPPCState *env, uint32_t opcode)
\
float_check_status(env); \
}
-VSX_CMP(xvcmpeqdp, 2, float64, VsrD(i), eq, 0)
-VSX_CMP(xvcmpgedp, 2, float64, VsrD(i), le, 1)
-VSX_CMP(xvcmpgtdp, 2, float64, VsrD(i), lt, 1)
-VSX_CMP(xvcmpeqsp, 4, float32, VsrW(i), eq, 0)
-VSX_CMP(xvcmpgesp, 4, float32, VsrW(i), le, 1)
-VSX_CMP(xvcmpgtsp, 4, float32, VsrW(i), lt, 1)
+VSX_CMP(xvcmpeqdp, 2, float64, VsrD(i), eq, 0, 1)
+VSX_CMP(xvcmpgedp, 2, float64, VsrD(i), le, 1, 1)
+VSX_CMP(xvcmpgtdp, 2, float64, VsrD(i), lt, 1, 1)
+VSX_CMP(xvcmpnedp, 2, float64, VsrD(i), eq, 0, 0)
+VSX_CMP(xvcmpeqsp, 4, float32, VsrW(i), eq, 0, 1)
+VSX_CMP(xvcmpgesp, 4, float32, VsrW(i), le, 1, 1)
+VSX_CMP(xvcmpgtsp, 4, float32, VsrW(i), lt, 1, 1)
+VSX_CMP(xvcmpnesp, 4, float32, VsrW(i), eq, 0, 0)
/* VSX_CVT_FP_TO_FP - VSX floating point/floating point conversion
* op - instruction mnemonic
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 0337292..3916b2e 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -454,6 +454,7 @@ DEF_HELPER_2(xvmindp, void, env, i32)
DEF_HELPER_2(xvcmpeqdp, void, env, i32)
DEF_HELPER_2(xvcmpgedp, void, env, i32)
DEF_HELPER_2(xvcmpgtdp, void, env, i32)
+DEF_HELPER_2(xvcmpnedp, void, env, i32)
DEF_HELPER_2(xvcvdpsp, void, env, i32)
DEF_HELPER_2(xvcvdpsxds, void, env, i32)
DEF_HELPER_2(xvcvdpsxws, void, env, i32)
@@ -491,6 +492,7 @@ DEF_HELPER_2(xvminsp, void, env, i32)
DEF_HELPER_2(xvcmpeqsp, void, env, i32)
DEF_HELPER_2(xvcmpgesp, void, env, i32)
DEF_HELPER_2(xvcmpgtsp, void, env, i32)
+DEF_HELPER_2(xvcmpnesp, void, env, i32)
DEF_HELPER_2(xvcvspdp, void, env, i32)
DEF_HELPER_2(xvcvspsxds, void, env, i32)
DEF_HELPER_2(xvcvspsxws, void, env, i32)
diff --git a/target-ppc/translate/vsx-impl.inc.c
b/target-ppc/translate/vsx-impl.inc.c
index bf167d0..5a27be4 100644
--- a/target-ppc/translate/vsx-impl.inc.c
+++ b/target-ppc/translate/vsx-impl.inc.c
@@ -685,6 +685,7 @@ GEN_VSX_HELPER_2(xvmindp, 0x00, 0x1D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpeqdp, 0x0C, 0x0C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpgtdp, 0x0C, 0x0D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpgedp, 0x0C, 0x0E, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xvcmpnedp, 0x0C, 0x0F, 0, PPC2_ISA300)
GEN_VSX_HELPER_2(xvcvdpsp, 0x12, 0x18, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcvdpsxds, 0x10, 0x1D, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcvdpsxws, 0x10, 0x0D, 0, PPC2_VSX)
@@ -722,6 +723,7 @@ GEN_VSX_HELPER_2(xvminsp, 0x00, 0x19, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpeqsp, 0x0C, 0x08, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpgtsp, 0x0C, 0x09, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcmpgesp, 0x0C, 0x0A, 0, PPC2_VSX)
+GEN_VSX_HELPER_2(xvcmpnesp, 0x0C, 0x0B, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcvspdp, 0x12, 0x1C, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcvspsxds, 0x10, 0x19, 0, PPC2_VSX)
GEN_VSX_HELPER_2(xvcvspsxws, 0x10, 0x09, 0, PPC2_VSX)
diff --git a/target-ppc/translate/vsx-ops.inc.c
b/target-ppc/translate/vsx-ops.inc.c
index 202c557..3d91041 100644
--- a/target-ppc/translate/vsx-ops.inc.c
+++ b/target-ppc/translate/vsx-ops.inc.c
@@ -179,6 +179,7 @@ GEN_XX3FORM(xvmindp, 0x00, 0x1D, PPC2_VSX),
GEN_XX3_RC_FORM(xvcmpeqdp, 0x0C, 0x0C, PPC2_VSX),
GEN_XX3_RC_FORM(xvcmpgtdp, 0x0C, 0x0D, PPC2_VSX),
GEN_XX3_RC_FORM(xvcmpgedp, 0x0C, 0x0E, PPC2_VSX),
+GEN_XX3_RC_FORM(xvcmpnedp, 0x0C, 0x0F, PPC2_ISA300),
GEN_XX2FORM(xvcvdpsp, 0x12, 0x18, PPC2_VSX),
GEN_XX2FORM(xvcvdpsxds, 0x10, 0x1D, PPC2_VSX),
GEN_XX2FORM(xvcvdpsxws, 0x10, 0x0D, PPC2_VSX),
@@ -216,6 +217,7 @@ GEN_XX3FORM(xvminsp, 0x00, 0x19, PPC2_VSX),
GEN_XX3_RC_FORM(xvcmpeqsp, 0x0C, 0x08, PPC2_VSX),
GEN_XX3_RC_FORM(xvcmpgtsp, 0x0C, 0x09, PPC2_VSX),
GEN_XX3_RC_FORM(xvcmpgesp, 0x0C, 0x0A, PPC2_VSX),
+GEN_XX3_RC_FORM(xvcmpnesp, 0x0C, 0x0B, PPC2_ISA300),
GEN_XX2FORM(xvcvspdp, 0x12, 0x1C, PPC2_VSX),
GEN_XX2FORM(xvcvspsxds, 0x10, 0x19, PPC2_VSX),
GEN_XX2FORM(xvcvspsxws, 0x10, 0x09, PPC2_VSX),
--
2.7.4
- [Qemu-ppc] [PULL 31/73] ppc/pnv: add a LPC controller, (continued)
- [Qemu-ppc] [PULL 31/73] ppc/pnv: add a LPC controller, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 39/73] pseries: Move construction of /interrupt-controller fdt node, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 37/73] pseries: Move adding of fdt reserve map entries, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 43/73] pseries: Move /hypervisor node construction to fdt_build_fdt(), David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 33/73] target-ppc: add vmul10[u, eu, cu, ecu]q instructions, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 65/73] target-ppc: add xscmp[eq, gt, ge, ne]dp instructions, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 55/73] tests: Adjust tco-test to use qpci_legacy_iomap(), David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 71/73] spapr: use count+index for memory hotplug, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 58/73] tests: Clean up IO handling in ide-test, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 64/73] tests: Add pseries machine to the prom-env-test, too, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 66/73] target-ppc: Add xvcmpnesp, xvcmpnedp instructions,
David Gibson <=
- [Qemu-ppc] [PULL 52/73] libqos: Handle PCI IO de-multiplexing in common code, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 56/73] libqos: Add streaming accessors for PCI MMIO, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 69/73] spapr: add hotplug interrupt machine options, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 49/73] spapr: improve ibm, architecture-vec-5 property handling, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 47/73] spapr_hcall: use spapr_ovec_* interfaces for CAS options, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 48/73] spapr: add option vector handling in CAS-generated resets, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 70/73] spapr: Add DRC count indexed hotplug identifier type, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 53/73] libqos: Move BAR assignment to common code, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 54/73] libqos: Better handling of PCI legacy IO, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 51/73] libqos: Give qvirtio_config_read*() consistent semantics, David Gibson, 2016/10/27