[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 18/73] ppc/xics: change the icp_ routines API to use an
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 18/73] ppc/xics: change the icp_ routines API to use an 'ICPState *' argument |
Date: |
Fri, 28 Oct 2016 12:37:19 +1100 |
From: Cédric Le Goater <address@hidden>
The routines :
void icp_set_cppr(ICPState *icp, uint8_t cppr);
void icp_set_mfrr(ICPState *icp, uint8_t mfrr);
void icp_eoi(ICPState *icp, uint32_t xirr);
now use one 'ICPState *icp' argument instead of a 'XICSState *' and a
server arguments. The backlink on XICSState* is used whenever needed.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xics.c | 25 ++++++++++---------------
hw/intc/xics_spapr.c | 18 +++++++++++-------
include/hw/ppc/xics.h | 6 +++---
3 files changed, 24 insertions(+), 25 deletions(-)
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 9f2c81a..095c16a 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -326,22 +326,20 @@ static void icp_check_ipi(ICPState *ss)
qemu_irq_raise(ss->output);
}
-static void icp_resend(XICSState *xics, int server)
+static void icp_resend(ICPState *ss)
{
- ICPState *ss = xics->ss + server;
ICSState *ics;
if (ss->mfrr < CPPR(ss)) {
icp_check_ipi(ss);
}
- QLIST_FOREACH(ics, &xics->ics, list) {
+ QLIST_FOREACH(ics, &ss->xics->ics, list) {
ics_resend(ics);
}
}
-void icp_set_cppr(XICSState *xics, int server, uint8_t cppr)
+void icp_set_cppr(ICPState *ss, uint8_t cppr)
{
- ICPState *ss = xics->ss + server;
uint8_t old_cppr;
uint32_t old_xisr;
@@ -361,15 +359,13 @@ void icp_set_cppr(XICSState *xics, int server, uint8_t
cppr)
}
} else {
if (!XISR(ss)) {
- icp_resend(xics, server);
+ icp_resend(ss);
}
}
}
-void icp_set_mfrr(XICSState *xics, int server, uint8_t mfrr)
+void icp_set_mfrr(ICPState *ss, uint8_t mfrr)
{
- ICPState *ss = xics->ss + server;
-
ss->mfrr = mfrr;
if (mfrr < CPPR(ss)) {
icp_check_ipi(ss);
@@ -398,23 +394,22 @@ uint32_t icp_ipoll(ICPState *ss, uint32_t *mfrr)
return ss->xirr;
}
-void icp_eoi(XICSState *xics, int server, uint32_t xirr)
+void icp_eoi(ICPState *ss, uint32_t xirr)
{
- ICPState *ss = xics->ss + server;
ICSState *ics;
uint32_t irq;
/* Send EOI -> ICS */
ss->xirr = (ss->xirr & ~CPPR_MASK) | (xirr & CPPR_MASK);
- trace_xics_icp_eoi(server, xirr, ss->xirr);
+ trace_xics_icp_eoi(ss->cs->cpu_index, xirr, ss->xirr);
irq = xirr & XISR_MASK;
- QLIST_FOREACH(ics, &xics->ics, list) {
+ QLIST_FOREACH(ics, &ss->xics->ics, list) {
if (ics_valid_irq(ics, irq)) {
ics_eoi(ics, irq);
}
}
if (!XISR(ss)) {
- icp_resend(xics, server);
+ icp_resend(ss);
}
}
@@ -673,7 +668,7 @@ static int ics_simple_post_load(ICSState *ics, int
version_id)
int i;
for (i = 0; i < ics->xics->nr_servers; i++) {
- icp_resend(ics->xics, i);
+ icp_resend(&ics->xics->ss[i]);
}
return 0;
diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index a09e1b0..b4e5501 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -43,9 +43,10 @@ static target_ulong h_cppr(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
CPUState *cs = CPU(cpu);
+ ICPState *icp = &spapr->xics->ss[cs->cpu_index];
target_ulong cppr = args[0];
- icp_set_cppr(spapr->xics, cs->cpu_index, cppr);
+ icp_set_cppr(icp, cppr);
return H_SUCCESS;
}
@@ -59,7 +60,7 @@ static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState
*spapr,
return H_PARAMETER;
}
- icp_set_mfrr(spapr->xics, server, mfrr);
+ icp_set_mfrr(spapr->xics->ss + server, mfrr);
return H_SUCCESS;
}
@@ -67,7 +68,8 @@ static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState
*spapr,
target_ulong opcode, target_ulong *args)
{
CPUState *cs = CPU(cpu);
- uint32_t xirr = icp_accept(spapr->xics->ss + cs->cpu_index);
+ ICPState *icp = &spapr->xics->ss[cs->cpu_index];
+ uint32_t xirr = icp_accept(icp);
args[0] = xirr;
return H_SUCCESS;
@@ -77,8 +79,8 @@ static target_ulong h_xirr_x(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
CPUState *cs = CPU(cpu);
- ICPState *ss = &spapr->xics->ss[cs->cpu_index];
- uint32_t xirr = icp_accept(ss);
+ ICPState *icp = &spapr->xics->ss[cs->cpu_index];
+ uint32_t xirr = icp_accept(icp);
args[0] = xirr;
args[1] = cpu_get_host_ticks();
@@ -89,9 +91,10 @@ static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineState
*spapr,
target_ulong opcode, target_ulong *args)
{
CPUState *cs = CPU(cpu);
+ ICPState *icp = &spapr->xics->ss[cs->cpu_index];
target_ulong xirr = args[0];
- icp_eoi(spapr->xics, cs->cpu_index, xirr);
+ icp_eoi(icp, xirr);
return H_SUCCESS;
}
@@ -99,8 +102,9 @@ static target_ulong h_ipoll(PowerPCCPU *cpu,
sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
CPUState *cs = CPU(cpu);
+ ICPState *icp = &spapr->xics->ss[cs->cpu_index];
uint32_t mfrr;
- uint32_t xirr = icp_ipoll(spapr->xics->ss + cs->cpu_index, &mfrr);
+ uint32_t xirr = icp_ipoll(icp, &mfrr);
args[0] = xirr;
args[1] = mfrr;
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 1468d6a..6e5a113 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -196,11 +196,11 @@ void xics_set_nr_servers(XICSState *xics, uint32_t
nr_servers,
/* Internal XICS interfaces */
int xics_get_cpu_index_by_dt_id(int cpu_dt_id);
-void icp_set_cppr(XICSState *icp, int server, uint8_t cppr);
-void icp_set_mfrr(XICSState *icp, int server, uint8_t mfrr);
+void icp_set_cppr(ICPState *icp, uint8_t cppr);
+void icp_set_mfrr(ICPState *icp, uint8_t mfrr);
uint32_t icp_accept(ICPState *ss);
uint32_t icp_ipoll(ICPState *ss, uint32_t *mfrr);
-void icp_eoi(XICSState *icp, int server, uint32_t xirr);
+void icp_eoi(ICPState *icp, uint32_t xirr);
void ics_simple_write_xive(ICSState *ics, int nr, int server,
uint8_t priority, uint8_t saved_priority);
--
2.7.4
- [Qemu-ppc] [PULL 08/73] tests: enable virtio tests on SPAPR, (continued)
- [Qemu-ppc] [PULL 08/73] tests: enable virtio tests on SPAPR, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 24/73] ppc/pnv: add skeleton PowerNV platform, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 26/73] ppc/pnv: add a core mask to PnvChip, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 10/73] nvram: Introduce helper functions for CHRP "system" and "free space" partitions, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 06/73] tests: rename target_big_endian() as qvirtio_is_big_endian(), David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 15/73] target-ppc: implement xxbr[qdwh] instruction, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 13/73] nvram: Rename openbios_firmware_abi.h into sun_nvram.h, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 12/73] nvram: Move the remaining CHRP NVRAM related code to chrp_nvram.[ch], David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 20/73] pseries: Remove unused callbacks from sPAPR VIO bus state, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 27/73] ppc/pnv: add a PIR handler to PnvChip, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 18/73] ppc/xics: change the icp_ routines API to use an 'ICPState *' argument,
David Gibson <=
- [Qemu-ppc] [PULL 17/73] ppc/xics: add a XICSState backlink in ICPState, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 07/73] tests: use qtest_pc_boot()/qtest_shutdown() in virtio tests, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 23/73] configure, ppc64: Copy skiboot.lid to build directory when configuring, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 34/73] pseries: Split device tree construction from device tree load, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 40/73] pseries: Consolidate construction of /chosen device tree node, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 25/73] ppc/pnv: add a PnvChip object, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 38/73] pseries: Consolidate RTAS loading, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 46/73] spapr_ovec: initial implementation of option vector helpers, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 28/73] ppc/pnv: add a PnvCore object, David Gibson, 2016/10/27
- [Qemu-ppc] [PULL 41/73] pseries: Consolidate construction of /rtas device tree node, David Gibson, 2016/10/27