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[Qemu-ppc] [PATCH] 2/4] target-ppc: Implement bcdctn. instruction
From: |
Jose Ricardo Ziviani |
Subject: |
[Qemu-ppc] [PATCH] 2/4] target-ppc: Implement bcdctn. instruction |
Date: |
Wed, 26 Oct 2016 11:18:56 -0200 |
bcdctn. converts from BCD to National numeric format. National format
uses a byte to represent a digit where the most significant nibble is
always 0x3 and the least sign. nibbles is the digit itself.
Signed-off-by: Jose Ricardo Ziviani <address@hidden>
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 46 +++++++++++++++++++++++++++++++++++++
target-ppc/translate/vmx-impl.inc.c | 24 ++++++++++++++++++-
3 files changed, 70 insertions(+), 1 deletion(-)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index d30ec60..92eaaf0 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -370,6 +370,7 @@ DEF_HELPER_4(vpermxor, void, avr, avr, avr, avr)
DEF_HELPER_4(bcdadd, i32, avr, avr, avr, i32)
DEF_HELPER_4(bcdsub, i32, avr, avr, avr, i32)
DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
+DEF_HELPER_2(bcdctn, i32, avr, avr)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 494c74e..cffe82c 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -2494,6 +2494,17 @@ static uint8_t get_national_digit(ppc_avr_t *reg, int n)
#endif
}
+static void set_national_digit(ppc_avr_t *reg, uint8_t val, int n)
+{
+#if defined(HOST_WORDS_BIGENDIAN)
+ reg->u16[8 - n] &= 0;
+ reg->u16[8 - n] |= val;
+#else
+ reg->u16[n] &= 0;
+ reg->u16[n] |= val;
+#endif
+}
+
static int bcd_cmp_mag(ppc_avr_t *a, ppc_avr_t *b)
{
int i;
@@ -2667,6 +2678,41 @@ uint32_t helper_bcdcfn(ppc_avr_t *r, ppc_avr_t *b,
uint32_t ps)
return cr;
}
+uint32_t helper_bcdctn(ppc_avr_t *r, ppc_avr_t *b)
+{
+ int i;
+ int cr = 0;
+ int invalid = 0;
+ int sgnb = bcd_get_sgn(b);
+ ppc_avr_t ret = { .u64 = { 0, 0 } };
+
+ int eq_flag = (b->u64[HI_IDX] == 0) && ((b->u64[LO_IDX] >> 4) == 0);
+ int ox_flag = (b->u64[HI_IDX] != 0) || ((b->u64[LO_IDX] >> 8) != 0);
+
+ for (i = 1; i < 8; i++) {
+ set_national_digit(&ret, 0x30 + bcd_get_digit(b, i, &invalid), i);
+ }
+ set_national_digit(&ret, (sgnb == -1) ? NATIONAL_NEG : NATIONAL_PLUS, 0);
+
+ if (!eq_flag) {
+ cr = (sgnb == -1) ? 1 << CRF_LT : 1 << CRF_GT;
+ } else {
+ cr = 1 << CRF_EQ;
+ }
+
+ if (ox_flag) {
+ cr |= 1 << CRF_SO;
+ }
+
+ if (unlikely(invalid)) {
+ cr = 1 << CRF_SO;
+ }
+
+ *r = ret;
+
+ return cr;
+}
+
void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
{
int i;
diff --git a/target-ppc/translate/vmx-impl.inc.c
b/target-ppc/translate/vmx-impl.inc.c
index 2abdcac..4364881 100644
--- a/target-ppc/translate/vmx-impl.inc.c
+++ b/target-ppc/translate/vmx-impl.inc.c
@@ -894,9 +894,29 @@ static void gen_##op(DisasContext *ctx) \
tcg_temp_free_i32(ps); \
}
+#define GEN_BCD3(op) \
+static void gen_##op(DisasContext *ctx) \
+{ \
+ TCGv_ptr rb, rd; \
+ \
+ if (unlikely(!ctx->altivec_enabled)) { \
+ gen_exception(ctx, POWERPC_EXCP_VPU); \
+ return; \
+ } \
+ \
+ rb = gen_avr_ptr(rB(ctx->opcode)); \
+ rd = gen_avr_ptr(rD(ctx->opcode)); \
+ \
+ gen_helper_##op(cpu_crf[6], rd, rb); \
+ \
+ tcg_temp_free_ptr(rb); \
+ tcg_temp_free_ptr(rd); \
+}
+
GEN_BCD(bcdadd)
GEN_BCD(bcdsub)
GEN_BCD2(bcdcfn)
+GEN_BCD3(bcdctn)
static void gen_xpnd04_1(DisasContext *ctx)
{
@@ -908,7 +928,8 @@ static void gen_xpnd04_1(DisasContext *ctx)
case 4:
break; /* bcdctz. */
case 5:
- break; /* bcdctn. */
+ gen_bcdctn(ctx);
+ break;
case 6:
break; /* bcdcfz. */
case 7:
@@ -1024,3 +1045,4 @@ GEN_VXFORM_DUAL(vsldoi, PPC_ALTIVEC, PPC_NONE,
#undef GEN_VAFORM_PAIRED
#undef GEN_BCD2
+#undef GEN_BCD3
--
2.7.4