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Re: [Qemu-ppc] [PATCH RESEND v2 17/17] target-ppc: add stxvb16x and stxv
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From: |
Nikunj A Dadhania |
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Subject: |
Re: [Qemu-ppc] [PATCH RESEND v2 17/17] target-ppc: add stxvb16x and stxvh8x |
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Date: |
Fri, 16 Sep 2016 13:58:05 +0530 |
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User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
David Gibson <address@hidden> writes:
> [ Unknown signature status ]
> On Mon, Sep 12, 2016 at 12:11:46PM +0530, Nikunj A Dadhania wrote:
>> stxvb16x: Store VSX Vector Byte*16
>> stxvh8x: Store VSX Vector Halfword*8
>>
>> Signed-off-by: Nikunj A Dadhania <address@hidden>
>
> Basically the same comments as on the load side - this looks bogus to
> me.
>
> I think it would make sense to fold together the corresponding load
> and store patches - makes it easier to review that they're doing
> matching things.
Sure, I will fold store/load together.
Regards
Nikunj
- Re: [Qemu-ppc] [PATCH RESEND v2 16/17] target-ppc: improve stxvw4x implementation, (continued)
- [Qemu-ppc] [PATCH RESEND v2 14/17] target-ppc: improve lxvw4x implementation, Nikunj A Dadhania, 2016/09/12
- [Qemu-ppc] [PATCH RESEND v2 15/17] target-ppc: add lxvb16x and lxvh8x, Nikunj A Dadhania, 2016/09/12
- [Qemu-ppc] [PATCH RESEND v2 13/17] target-ppc: add stxsi[bh]x instruction, Nikunj A Dadhania, 2016/09/12
- [Qemu-ppc] [PATCH RESEND v2 17/17] target-ppc: add stxvb16x and stxvh8x, Nikunj A Dadhania, 2016/09/12
- Re: [Qemu-ppc] [Qemu-devel] [PATCH RESEND v2 00/17] POWER9 TCG enablements - part4, no-reply, 2016/09/12
- Re: [Qemu-ppc] [PATCH RESEND v2 00/17] POWER9 TCG enablements - part4, David Gibson, 2016/09/14