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Re: [Qemu-ppc] [PATCHv2 07/10] target-ppc: Split 44x tlbiva from ppc_tlb
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCHv2 07/10] target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one() |
Date: |
Thu, 28 Jan 2016 10:31:14 +1100 |
User-agent: |
Mutt/1.5.24 (2015-08-30) |
On Wed, Jan 27, 2016 at 06:58:43PM +0100, Laurent Vivier wrote:
> On 27/01/2016 11:13, David Gibson wrote:
> > Currently both the tlbiva instruction (used on 44x chips) and the tlbie
> > instruction (used on hash MMU chips) are both handled via
> > ppc_tlb_invalidate_one(). This is silly, because they're invoked from
> > different places, and do different things.
> >
> > Clean this up by separating out the tlbiva instruction into its own
> > handling. In fact the implementation is only a stub anyway.
> >
> > Signed-off-by: David Gibson <address@hidden>
> > ---
> > target-ppc/helper.h | 1 +
> > target-ppc/mmu_helper.c | 14 ++++++++++----
> > target-ppc/translate.c | 2 +-
> > 3 files changed, 12 insertions(+), 5 deletions(-)
> >
> > diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> > index 869be15..e5a8f7b 100644
> > --- a/target-ppc/helper.h
> > +++ b/target-ppc/helper.h
> > @@ -544,6 +544,7 @@ DEF_HELPER_2(74xx_tlbd, void, env, tl)
> > DEF_HELPER_2(74xx_tlbi, void, env, tl)
> > DEF_HELPER_FLAGS_1(tlbia, TCG_CALL_NO_RWG, void, env)
> > DEF_HELPER_FLAGS_2(tlbie, TCG_CALL_NO_RWG, void, env, tl)
> > +DEF_HELPER_FLAGS_2(tlbiva, TCG_CALL_NO_RWG, void, env, tl)
> > #if defined(TARGET_PPC64)
> > DEF_HELPER_FLAGS_3(store_slb, TCG_CALL_NO_RWG, void, env, tl, tl)
> > DEF_HELPER_2(load_slb_esid, tl, env, tl)
> > diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> > index 82ebe5d..e9e0edb 100644
> > --- a/target-ppc/mmu_helper.c
> > +++ b/target-ppc/mmu_helper.c
> > @@ -1971,10 +1971,6 @@ void ppc_tlb_invalidate_one(CPUPPCState *env,
> > target_ulong addr)
> > ppc6xx_tlb_invalidate_virt(env, addr, 1);
> > }
> > break;
> > - case POWERPC_MMU_BOOKE:
> > - /* XXX: TODO */
> > - cpu_abort(CPU(cpu), "BookE MMU model is not implemented\n");
> > - break;
> > case POWERPC_MMU_32B:
> > case POWERPC_MMU_601:
> > /* tlbie invalidate TLBs for all segments */
> > @@ -2116,6 +2112,16 @@ void helper_tlbie(CPUPPCState *env, target_ulong
> > addr)
> > ppc_tlb_invalidate_one(env, addr);
> > }
> >
> > +void helper_tlbiva(CPUPPCState *env, target_ulong addr)
> > +{
> > + PowerPCCPU *cpu = ppc_env_get_cpu(env);
> > +
> > + /* tlbiva instruciton only exists on BookE */
>
> Typo here ^^
Corrected, thanks.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCHv2 00/10] Clean up page size handling for ppc 64-bit hash MMUs with TCG, David Gibson, 2016/01/27
- [Qemu-ppc] [PATCHv2 06/10] target-ppc: Remove unused mmu models from ppc_tlb_invalidate_one, David Gibson, 2016/01/27
- [Qemu-ppc] [PATCHv2 08/10] target-ppc: Add new TLB invalidate by HPTE call for hash64 MMUs, David Gibson, 2016/01/27
- [Qemu-ppc] [PATCHv2 07/10] target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one(), David Gibson, 2016/01/27
- [Qemu-ppc] [PATCHv2 04/10] target-ppc: Rework SLB page size lookup, David Gibson, 2016/01/27
- [Qemu-ppc] [PATCHv2 09/10] target-ppc: Helper to determine page size information from hpte alone, David Gibson, 2016/01/27
- [Qemu-ppc] [PATCHv2 05/10] target-ppc: Use actual page size encodings from HPTE, David Gibson, 2016/01/27
- [Qemu-ppc] [PATCHv2 03/10] target-ppc: Rework ppc_store_slb, David Gibson, 2016/01/27