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[Qemu-ppc] [PULL 7/7] target-ppc: fix xscmpodp and xscmpudp decoding
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 7/7] target-ppc: fix xscmpodp and xscmpudp decoding |
Date: |
Sun, 20 Sep 2015 22:53:18 +0200 |
From: Aurelien Jarno <address@hidden>
The xscmpodp and xscmpudp instructions only have the AX, BX bits in
there encoding, the lowest bit (usually TX) is marked as an invalid
bit. We therefore can't decode them with GEN_XX2FORM, which decodes
the two lowest bit.
Introduce a new form GEN_XX2FORM, which decodes AX and BX and mark
the lowest bit as invalid.
Signed-off-by: Aurelien Jarno <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Tested-by: Richard W.M. Jones <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 84c5cea..c0eed13 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -10670,6 +10670,13 @@ GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 0,
PPC_NONE, fl2), \
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 2, opc3, 0, PPC_NONE, fl2), \
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 3, opc3, 0, PPC_NONE, fl2)
+#undef GEN_XX2IFORM
+#define GEN_XX2IFORM(name, opc2, opc3, fl2) \
+GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0, opc3, 1, PPC_NONE, fl2), \
+GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 1, opc3, 1, PPC_NONE, fl2), \
+GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 2, opc3, 1, PPC_NONE, fl2), \
+GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 3, opc3, 1, PPC_NONE, fl2)
+
#undef GEN_XX3_RC_FORM
#define GEN_XX3_RC_FORM(name, opc2, opc3, fl2) \
GEN_HANDLER2_E(name, #name, 0x3C, opc2 | 0x00, opc3 | 0x00, 0, PPC_NONE, fl2),
\
@@ -10731,8 +10738,8 @@ GEN_XX3FORM(xsnmaddadp, 0x04, 0x14, PPC2_VSX),
GEN_XX3FORM(xsnmaddmdp, 0x04, 0x15, PPC2_VSX),
GEN_XX3FORM(xsnmsubadp, 0x04, 0x16, PPC2_VSX),
GEN_XX3FORM(xsnmsubmdp, 0x04, 0x17, PPC2_VSX),
-GEN_XX2FORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
-GEN_XX2FORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
+GEN_XX2IFORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
+GEN_XX2IFORM(xscmpudp, 0x0C, 0x04, PPC2_VSX),
GEN_XX3FORM(xsmaxdp, 0x00, 0x14, PPC2_VSX),
GEN_XX3FORM(xsmindp, 0x00, 0x15, PPC2_VSX),
GEN_XX2FORM(xscvdpsp, 0x12, 0x10, PPC2_VSX),
--
1.8.1.4
- [Qemu-ppc] [PULL 0/7] ppc patch queue 2015-09-20, Alexander Graf, 2015/09/20
- [Qemu-ppc] [PULL 2/7] mac_dbdma: always clear FLUSH bit once DBDMA channel flush is complete, Alexander Graf, 2015/09/20
- [Qemu-ppc] [PULL 4/7] target-ppc: Fix SRR0 when taking unaligned exceptions, Alexander Graf, 2015/09/20
- [Qemu-ppc] [PULL 3/7] PPC: e500 pci host: Fix ATMUs register reads, Alexander Graf, 2015/09/20
- [Qemu-ppc] [PULL 7/7] target-ppc: fix xscmpodp and xscmpudp decoding,
Alexander Graf <=
- [Qemu-ppc] [PULL 1/7] kvm_ppc: remove kvmppc_timer_hack, Alexander Graf, 2015/09/20
- [Qemu-ppc] [PULL 6/7] target-ppc: fix vcipher, vcipherlast, vncipherlast and vpermxor, Alexander Graf, 2015/09/20
- [Qemu-ppc] [PULL 5/7] PPC: E500: Update u-boot to commit 79c884d7e4, Alexander Graf, 2015/09/20
- Re: [Qemu-ppc] [PULL 0/7] ppc patch queue 2015-09-20, Peter Maydell, 2015/09/21