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[Qemu-ppc] [PATCH v8 5/7] Obsolete PCI_MSIX_FLAGS_BIRMASK
From: |
Gavin Shan |
Subject: |
[Qemu-ppc] [PATCH v8 5/7] Obsolete PCI_MSIX_FLAGS_BIRMASK |
Date: |
Mon, 14 Sep 2015 11:36:13 +1000 |
This replaces PCI_MSIX_FLAGS_BIRMASK with PCI_MSIX_TABLE_BIR. Also,
3 more macros regarding MSIx table offset, MSIx PBA BAR index and
MSIx PBA offset and this uses them. Besides, PCI_ERR_UNC_TRAIN is
replaced with PCI_ERR_UNC_UND. The changes were introduced by
below Linux upstream commits:
commit 24bc69da ("PCI: Clean up MSI/MSI-X capability #defines")
commit 846fc709 ("PCI/AER: Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND")
Signed-off-by: Gavin Shan <address@hidden>
Reviewed-by: David Gibson <address@hidden>
---
hw/i386/kvm/pci-assign.c | 4 ++--
hw/pci/msix.c | 2 +-
hw/pci/pcie_aer.c | 2 +-
hw/s390x/s390-pci-bus.c | 8 ++++----
hw/vfio/pci.c | 8 ++++----
hw/xen/xen_pt_msi.c | 4 ++--
tests/libqos/pci.c | 8 ++++----
7 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/hw/i386/kvm/pci-assign.c b/hw/i386/kvm/pci-assign.c
index b1beaa6..46d2749 100644
--- a/hw/i386/kvm/pci-assign.c
+++ b/hw/i386/kvm/pci-assign.c
@@ -1310,8 +1310,8 @@ static int assigned_device_pci_cap_init(PCIDevice
*pci_dev, Error **errp)
PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL);
msix_table_entry = pci_get_long(pci_dev->config + pos +
PCI_MSIX_TABLE);
- bar_nr = msix_table_entry & PCI_MSIX_FLAGS_BIRMASK;
- msix_table_entry &= ~PCI_MSIX_FLAGS_BIRMASK;
+ bar_nr = msix_table_entry & PCI_MSIX_TABLE_BIR;
+ msix_table_entry &= PCI_MSIX_TABLE_OFFSET;
dev->msix_table_addr = pci_region[bar_nr].base_addr + msix_table_entry;
dev->msix_max = msix_max;
}
diff --git a/hw/pci/msix.c b/hw/pci/msix.c
index 2fdada4..11beee5 100644
--- a/hw/pci/msix.c
+++ b/hw/pci/msix.c
@@ -250,7 +250,7 @@ int msix_init(struct PCIDevice *dev, unsigned short
nentries,
ranges_overlap(table_offset, table_size, pba_offset, pba_size)) ||
table_offset + table_size > memory_region_size(table_bar) ||
pba_offset + pba_size > memory_region_size(pba_bar) ||
- (table_offset | pba_offset) & PCI_MSIX_FLAGS_BIRMASK) {
+ (table_offset | pba_offset) & PCI_MSIX_TABLE_BIR) {
return -EINVAL;
}
diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
index f1847ac..1def4a4 100644
--- a/hw/pci/pcie_aer.c
+++ b/hw/pci/pcie_aer.c
@@ -828,7 +828,7 @@ typedef struct PCIEAERErrorName {
static const struct PCIEAERErrorName pcie_aer_error_list[] = {
{
.name = "TRAIN",
- .val = PCI_ERR_UNC_TRAIN,
+ .val = PCI_ERR_UNC_UND,
.correctable = false,
}, {
.name = "DLP",
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 560b66a..7dac2c0 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -507,10 +507,10 @@ static int s390_pcihost_setup_msix(S390PCIBusDevice
*pbdev)
pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
pci_config_size(pbdev->pdev), sizeof(pba));
- pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
- pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
- pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
- pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
+ pbdev->msix.table_bar = table & PCI_MSIX_TABLE_BIR;
+ pbdev->msix.table_offset = table & PCI_MSIX_TABLE_OFFSET;
+ pbdev->msix.pba_bar = pba & PCI_MSIX_PBA_BIR;
+ pbdev->msix.pba_offset = pba & PCI_MSIX_PBA_OFFSET;
pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
pbdev->msix.available = true;
return 0;
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 4023d8e..0481d05 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -2244,10 +2244,10 @@ static int vfio_early_setup_msix(VFIOPCIDevice *vdev)
pba = le32_to_cpu(pba);
vdev->msix = g_malloc0(sizeof(*(vdev->msix)));
- vdev->msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
- vdev->msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
- vdev->msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
- vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
+ vdev->msix->table_bar = table & PCI_MSIX_TABLE_BIR;
+ vdev->msix->table_offset = table & PCI_MSIX_TABLE_OFFSET;
+ vdev->msix->pba_bar = pba & PCI_MSIX_PBA_BIR;
+ vdev->msix->pba_offset = pba & PCI_MSIX_PBA_OFFSET;
vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
/*
diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c
index e3d7194..61efbe2 100644
--- a/hw/xen/xen_pt_msi.c
+++ b/hw/xen/xen_pt_msi.c
@@ -565,8 +565,8 @@ int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t
base)
& XC_PAGE_MASK);
xen_host_pci_get_long(hd, base + PCI_MSIX_TABLE, &table_off);
- bar_index = msix->bar_index = table_off & PCI_MSIX_FLAGS_BIRMASK;
- table_off = table_off & ~PCI_MSIX_FLAGS_BIRMASK;
+ bar_index = msix->bar_index = table_off & PCI_MSIX_TABLE_BIR;
+ table_off = table_off & PCI_MSIX_TABLE_OFFSET;
msix->table_base = s->real_device.io_regions[bar_index].base_addr;
XEN_PT_LOG(d, "get MSI-X table BAR base 0x%"PRIx64"\n", msix->table_base);
diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c
index 4e630c2..55fe5bf 100644
--- a/tests/libqos/pci.c
+++ b/tests/libqos/pci.c
@@ -110,16 +110,16 @@ void qpci_msix_enable(QPCIDevice *dev)
qpci_config_writew(dev, addr + PCI_MSIX_FLAGS, val |
PCI_MSIX_FLAGS_ENABLE);
table = qpci_config_readl(dev, addr + PCI_MSIX_TABLE);
- bir_table = table & PCI_MSIX_FLAGS_BIRMASK;
+ bir_table = table & PCI_MSIX_TABLE_BIR;
offset = qpci_iomap(dev, bir_table, NULL);
- dev->msix_table = offset + (table & ~PCI_MSIX_FLAGS_BIRMASK);
+ dev->msix_table = offset + (table & PCI_MSIX_TABLE_OFFSET);
table = qpci_config_readl(dev, addr + PCI_MSIX_PBA);
- bir_pba = table & PCI_MSIX_FLAGS_BIRMASK;
+ bir_pba = table & PCI_MSIX_PBA_BIR;
if (bir_pba != bir_table) {
offset = qpci_iomap(dev, bir_pba, NULL);
}
- dev->msix_pba = offset + (table & ~PCI_MSIX_FLAGS_BIRMASK);
+ dev->msix_pba = offset + (table & PCI_MSIX_PBA_OFFSET);
g_assert(dev->msix_table != NULL);
g_assert(dev->msix_pba != NULL);
--
2.1.0
- [Qemu-ppc] [PATCH v8 0/7] sPAPR: Support EEH Error Injection, Gavin Shan, 2015/09/13
- [Qemu-ppc] [PATCH v8 3/7] scripts: Submit changes while updating linux headers, Gavin Shan, 2015/09/13
- [Qemu-ppc] [PATCH v8 2/7] scripts: Include arch/powerpc/include/uapi/asm/eeh.h, Gavin Shan, 2015/09/13
- [Qemu-ppc] [PATCH v8 1/7] scripts: Allow include "stdint.h" in virtio headers, Gavin Shan, 2015/09/13
- [Qemu-ppc] [PATCH v8 4/7] Synchronize Linux headers from kernel 4.3.0-rc1, Gavin Shan, 2015/09/13
- [Qemu-ppc] [PATCH v8 6/7] sPAPR: Support RTAS call ibm, {open, close}-errinjct, Gavin Shan, 2015/09/13
- [Qemu-ppc] [PATCH v8 5/7] Obsolete PCI_MSIX_FLAGS_BIRMASK,
Gavin Shan <=
- [Qemu-ppc] [PATCH v8 7/7] sPAPR: Support RTAS call ibm,errinjct, Gavin Shan, 2015/09/13
- Re: [Qemu-ppc] [PATCH v8 0/7] sPAPR: Support EEH Error Injection, David Gibson, 2015/09/14