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[Qemu-ppc] [PULL 30/52] target-ppc: Bug Fix: mullw
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 30/52] target-ppc: Bug Fix: mullw |
Date: |
Thu, 4 Sep 2014 19:20:18 +0200 |
From: Tom Musta <address@hidden>
For 64-bit implementations, the mullw result is the 64 bit product
of the sign-extended least significant 32 bits of the source
registers.
Fix the code to properly sign extend the source operands and produce
a 64 bit product.
Example:
R3 00000000002F37A0
R4 41C33D242F816715
mullw 3,3,4
R3 expected : 0008C3146AE0F020
R3 actual : 000000006AE0F020 (without this patch)
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index dc80b02..b19eb14 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1128,9 +1128,20 @@ static void gen_mulhwu(DisasContext *ctx)
/* mullw mullw. */
static void gen_mullw(DisasContext *ctx)
{
+#if defined(TARGET_PPC64)
+ TCGv_i64 t0, t1;
+ t0 = tcg_temp_new_i64();
+ t1 = tcg_temp_new_i64();
+ tcg_gen_ext32s_tl(t0, cpu_gpr[rA(ctx->opcode)]);
+ tcg_gen_ext32s_tl(t1, cpu_gpr[rB(ctx->opcode)]);
+ tcg_gen_mul_i64(cpu_gpr[rD(ctx->opcode)], t0, t1);
+ tcg_temp_free(t0);
+ tcg_temp_free(t1);
+#else
tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)],
cpu_gpr[rB(ctx->opcode)]);
tcg_gen_ext32s_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)]);
+#endif
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
}
--
1.8.1.4
- [Qemu-ppc] [PULL 05/52] linux-user: Enable Signal Handlers on PPC64, (continued)
- [Qemu-ppc] [PULL 05/52] linux-user: Enable Signal Handlers on PPC64, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 06/52] linux-user: Properly Dereference PPC64 ELFv1 Signal Handler Pointer, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 20/52] spapr: Locate RTAS and device-tree based on real RMA, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 22/52] ppc: synchronize excp_vectors for injecting exception, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 11/52] PPC: mac99: Move NVRAM to page boundary when necessary, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 27/52] target-ppc: Bug Fix: rlwnm, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 24/52] ppc: Add hw breakpoint watchpoint support, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 26/52] target-ppc: Bug Fix: rlwinm, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 33/52] target-ppc: Bug Fix: srad, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 25/52] ppc/spapr: Fix MAX_CPUS to 255, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 30/52] target-ppc: Bug Fix: mullw,
Alexander Graf <=
- [Qemu-ppc] [PULL 37/52] PPC: mac_nvram: Remove unused functions, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 35/52] PPC: KVM: Use vm check_extension for pv hcall, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 29/52] target-ppc: Bug Fix: mullwo, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 44/52] target-ppc: Special Case of rlwimi Should Use Deposit, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 36/52] PPC: mac99: Fix core99 timer frequency, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 31/52] target-ppc: Bug Fix: mulldo OV Detection, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 34/52] KVM: Add helper to run KVM_CHECK_EXTENSION on vm fd, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 28/52] target-ppc: Bug Fix: rlwimi, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 32/52] target-ppc: Bug Fix: srawi, Alexander Graf, 2014/09/04
- [Qemu-ppc] [PULL 43/52] spapr-vlan: Don't touch last entry in buffer list, Alexander Graf, 2014/09/04