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[Qemu-ppc] [PATCH v3 10/10] trace: [tcg] Include TCG-tracing header on a


From: Lluís Vilanova
Subject: [Qemu-ppc] [PATCH v3 10/10] trace: [tcg] Include TCG-tracing header on all targets
Date: Wed, 28 May 2014 19:43:48 +0200
User-agent: StGit/0.17.1-dirty

Signed-off-by: Lluís Vilanova <address@hidden>
---
 target-alpha/translate.c      |    3 +++
 target-arm/translate-a64.c    |    2 ++
 target-arm/translate.c        |    3 +++
 target-cris/translate.c       |    3 +++
 target-i386/translate.c       |    3 +++
 target-lm32/translate.c       |    3 +++
 target-m68k/translate.c       |    3 +++
 target-microblaze/translate.c |    3 +++
 target-mips/translate.c       |    3 +++
 target-openrisc/translate.c   |    3 +++
 target-ppc/translate.c        |    3 +++
 target-s390x/translate.c      |    2 ++
 target-sh4/translate.c        |    3 +++
 target-sparc/translate.c      |    3 +++
 target-unicore32/translate.c  |    3 +++
 target-xtensa/translate.c     |    3 +++
 16 files changed, 46 insertions(+)

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 91c3ed1..57a29cd 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -26,6 +26,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #undef ALPHA_DEBUG_DISAS
 #define CONFIG_SOFTFLOAT_INLINE
 
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index b62db4d..d5febb9 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -35,6 +35,8 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
 static TCGv_i64 cpu_X[32];
 static TCGv_i64 cpu_pc;
 static TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF;
diff --git a/target-arm/translate.c b/target-arm/translate.c
index a4d920b..7e7ce48 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -35,6 +35,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define ENABLE_ARCH_4T    arm_feature(env, ARM_FEATURE_V4T)
 #define ENABLE_ARCH_5     arm_feature(env, ARM_FEATURE_V5)
 /* currently all emulated v5 cores are also v5TE, so don't bother */
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 724f920..703b0ef 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -33,6 +33,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define DISAS_CRIS 0
 #if DISAS_CRIS
 #  define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 02625e3..366cfda 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -32,6 +32,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define PREFIX_REPZ   0x01
 #define PREFIX_REPNZ  0x02
 #define PREFIX_LOCK   0x04
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index c8abd1f..520083a 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -27,6 +27,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define DISAS_LM32 1
 #if DISAS_LM32
 #  define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index cd66289..9496094 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -27,6 +27,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 //#define DEBUG_DISPATCH 1
 
 /* Fake floating point.  */
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 782a489..fff5a17 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -27,6 +27,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define SIM_COMPAT 0
 #define DISAS_GNU 1
 #define DISAS_MB 1
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 05f82d2..4d56689 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -29,6 +29,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define MIPS_DEBUG_DISAS 0
 //#define MIPS_DEBUG_SIGN_EXTENSIONS
 
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 852b5e6..47980b0 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -31,6 +31,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define OPENRISC_DISAS
 
 #ifdef OPENRISC_DISAS
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index e3fcb03..7cb6d3f 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -27,6 +27,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define CPU_SINGLE_STEP 0x1
 #define CPU_BRANCH_STEP 0x2
 #define GDBSTUB_SINGLE_STEP 0x4
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 81b7e33..3ebb36a 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -42,6 +42,8 @@ static TCGv_ptr cpu_env;
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
 
 /* Information that (most) every instruction needs to manipulate.  */
 typedef struct DisasContext DisasContext;
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 2360609..bc96d62 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -28,6 +28,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 typedef struct DisasContext {
     struct TranslationBlock *tb;
     target_ulong pc;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 2de1c4a..cae28cd 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -32,6 +32,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 #define DEBUG_DISAS
 
 #define DYNAMIC_PC  1 /* dynamic pc value */
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index c2402cf..e6be508 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -23,6 +23,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 /* internal defines */
 typedef struct DisasContext {
     target_ulong pc;
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 764cee9..e559ae3 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -41,6 +41,9 @@
 #define GEN_HELPER 1
 #include "helper.h"
 
+#include "trace-tcg.h"
+
+
 typedef struct DisasContext {
     const XtensaConfig *config;
     TranslationBlock *tb;




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