Most of the PMU SPRs were wrong on Book3S.
Signed-off-by: Anton Blanchard <address@hidden>
---
target-ppc/cpu.h | 29 ++++++++-
target-ppc/translate_init.c | 139 +++++++++++++++++++++++++++++++++++++++-----
2 files changed, 153 insertions(+), 15 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 2719c08..7082041 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1452,54 +1452,81 @@ static inline int cpu_mmu_index (CPUPPCState *env)
#define SPR_MPC_MI_CTR (0x300)
#define SPR_PERF1 (0x301)
#define SPR_RCPU_MI_RBA1 (0x301)
+#define SPR_BOOK3S_UMMCR2 (0x301)
#define SPR_PERF2 (0x302)
#define SPR_RCPU_MI_RBA2 (0x302)
#define SPR_MPC_MI_AP (0x302)
-#define SPR_MMCRA (0x302)
+#define SPR_BOOK3S_UMMCRA (0x302)
#define SPR_PERF3 (0x303)
#define SPR_RCPU_MI_RBA3 (0x303)
#define SPR_MPC_MI_EPN (0x303)
+#define SPR_BOOK3S_UPMC1 (0x303)
#define SPR_PERF4 (0x304)
+#define SPR_BOOK3S_UPMC2 (0x304)
#define SPR_PERF5 (0x305)
#define SPR_MPC_MI_TWC (0x305)
+#define SPR_BOOK3S_UPMC3 (0x305)
#define SPR_PERF6 (0x306)
#define SPR_MPC_MI_RPN (0x306)
+#define SPR_BOOK3S_UPMC4 (0x306)
#define SPR_PERF7 (0x307)
+#define SPR_BOOK3S_UPMC5 (0x307)
#define SPR_PERF8 (0x308)
#define SPR_RCPU_L2U_RBA0 (0x308)
#define SPR_MPC_MD_CTR (0x308)
+#define SPR_BOOK3S_UPMC6 (0x308)
#define SPR_PERF9 (0x309)
#define SPR_RCPU_L2U_RBA1 (0x309)
#define SPR_MPC_MD_CASID (0x309)
+#define SPR_BOOK3S_UPMC7 (0x309)
#define SPR_PERFA (0x30A)
#define SPR_RCPU_L2U_RBA2 (0x30A)
#define SPR_MPC_MD_AP (0x30A)
+#define SPR_BOOK3S_UPMC8 (0x30A)
#define SPR_PERFB (0x30B)
#define SPR_RCPU_L2U_RBA3 (0x30B)
#define SPR_MPC_MD_EPN (0x30B)
+#define SPR_BOOK3S_UMMCR0 (0x30B)
#define SPR_PERFC (0x30C)
#define SPR_MPC_MD_TWB (0x30C)
+#define SPR_BOOK3S_USIAR (0x30C)
#define SPR_PERFD (0x30D)
#define SPR_MPC_MD_TWC (0x30D)
+#define SPR_BOOK3S_USDAR (0x30D)
#define SPR_PERFE (0x30E)
#define SPR_MPC_MD_RPN (0x30E)
+#define SPR_BOOK3S_UMMCR1 (0x30E)
#define SPR_PERFF (0x30F)
#define SPR_MPC_MD_TW (0x30F)
#define SPR_UPERF0 (0x310)
#define SPR_UPERF1 (0x311)
+#define SPR_BOOK3S_MMCR2 (0x311)
#define SPR_UPERF2 (0x312)
+#define SPR_BOOK3S_MMCRA (0x312)
#define SPR_UPERF3 (0x313)
+#define SPR_BOOK3S_PMC1 (0x313)
#define SPR_UPERF4 (0x314)
+#define SPR_BOOK3S_PMC2 (0x314)
#define SPR_UPERF5 (0x315)
+#define SPR_BOOK3S_PMC3 (0x315)
#define SPR_UPERF6 (0x316)
+#define SPR_BOOK3S_PMC4 (0x316)
#define SPR_UPERF7 (0x317)
+#define SPR_BOOK3S_PMC5 (0x317)
#define SPR_UPERF8 (0x318)
+#define SPR_BOOK3S_PMC6 (0x318)
#define SPR_UPERF9 (0x319)
+#define SPR_BOOK3S_PMC7 (0x319)
#define SPR_UPERFA (0x31A)
+#define SPR_BOOK3S_PMC8 (0x31A)
#define SPR_UPERFB (0x31B)
+#define SPR_BOOK3S_MMCR0 (0x31B)
#define SPR_UPERFC (0x31C)
+#define SPR_BOOK3S_SIAR (0x31C)
#define SPR_UPERFD (0x31D)
+#define SPR_BOOK3S_SDAR (0x31D)
#define SPR_UPERFE (0x31E)
+#define SPR_BOOK3S_MMCR1 (0x31E)
#define SPR_UPERFF (0x31F)
#define SPR_RCPU_MI_RA0 (0x320)
#define SPR_MPC_MI_DBCAM (0x320)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index d07e186..273e37d 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6629,10 +6629,128 @@ static int check_pow_970 (CPUPPCState *env)
return 0;
}
+/* SPR common to all book3s implementations */
+static void gen_spr_book3s (CPUPPCState *env)