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Re: [Qemu-ppc] [Qemu-devel] [PULL for-2.0 2/7] raven: Implement non-cont

From: Hervé Poussineau
Subject: Re: [Qemu-ppc] [Qemu-devel] [PULL for-2.0 2/7] raven: Implement non-contiguous I/O region
Date: Sat, 05 Apr 2014 22:50:05 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20131103 Icedove/17.0.10

Le sam. 05 avril 2014 22:34:38 CEST, Alexander Graf a écrit :

On 05.04.2014, at 22:26, Hervé Poussineau <address@hidden> wrote:

Hi Andreas,

Le sam. 05 avril 2014 17:41:43 CEST, Andreas Färber a écrit :
Hi Hervé,

Am 20.03.2014 00:36, schrieb Andreas Färber:
From: Hervé Poussineau <address@hidden>

Remove now duplicated code from prep board.

Signed-off-by: Hervé Poussineau <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
  hw/pci-host/prep.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++++
  hw/ppc/prep.c      | 94 ++----------------------------------------------------
  2 files changed, 88 insertions(+), 91 deletions(-)

I'm facing endianness-test failures in -rc1 on both openSUSE ppc/ppc64
and OSX ppc64 (below) as well as "broken pipe" on OSX ppc.

$ make check-qtest-ppc V=1
   /ppc/endianness/prep:                                              **
assertion failed (isa_inw(test, 0xe2) == 0x8765): (0x00004321 == 0x00008765)
   /ppc/endianness/split/prep:                                        **
assertion failed (isa_inw(test, 0xe2) == 0x8765): (0x00004321 == 0x00008765)
   /ppc/endianness/combine/prep:                                      **
assertion failed (isa_inw(test, 0xea) == 0x8765): (0x00004321 == 0x00008765)
FAIL: tests/endianness-test

On x86 everything is fine. git-bisect points to this commit.

There is one "FIXME: handle endianness switch" in here, but I don't spot
such code where it's being moved from either.

The FIXME here is only when we'll handle dynamic endianess switching of the system (not of the CPU). It was not present in code moved in this commit, and I only added the comment to tell where to place it.

My suspect is the cpu_inw() -> ldl_p() change, but I'm unsure whether
the code or the test is wrong...

Code removed in this commit was using DEVICE_NATIVE_ENDIAN, and then using 
cpu_inl, which does a ldl_p.
Code added in this commit is using DEVICE_LITTLE_ENDIAN, and then is using 
So, yes, it seems that endianness of memory region does change things. Native 
endian means native endian of the guest of of the host?

It means "default endianness of the guest cpu" so that accesses coming from the 
CPU get passed in the value they had in the CPU registers :).

In that case, behaviour should be the same between x86 host and openSUSE ppc/ppc64 and OSX ppc64 hosts.
The culprit is elsewhere...


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