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[Qemu-ppc] [PULL 120/130] target-ppc/translate.c: Use ULL suffix for 64
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PULL 120/130] target-ppc/translate.c: Use ULL suffix for 64 bit constants |
Date: |
Fri, 7 Mar 2014 00:34:07 +0100 |
From: Peter Maydell <address@hidden>
64 bit constants need the "ULL" suffix, not just "UL", because
on 32 bit platforms 'long' is not large enough and this will
cause a compiler warning.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Stefan Weil <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index cf8f98a..051693b 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7727,8 +7727,8 @@ static void gen_xxpermdi(DisasContext *ctx)
#define OP_NABS 2
#define OP_NEG 3
#define OP_CPSGN 4
-#define SGN_MASK_DP 0x8000000000000000ul
-#define SGN_MASK_SP 0x8000000080000000ul
+#define SGN_MASK_DP 0x8000000000000000ull
+#define SGN_MASK_SP 0x8000000080000000ull
#define VSX_SCALAR_MOVE(name, op, sgn_mask) \
static void glue(gen_, name)(DisasContext * ctx) \
--
1.8.1.4
- [Qemu-ppc] [PULL 092/130] target-ppc: Altivec 2.07: Update AVR Structure, (continued)
- [Qemu-ppc] [PULL 092/130] target-ppc: Altivec 2.07: Update AVR Structure, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 097/130] target-ppc: Altivec 2.07: Vector Logical Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 095/130] target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 094/130] target-ppc: Altivec 2.07: Add Support for Dual Altivec Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 096/130] target-ppc: Altivec 2.07: Add Support for R-Form Dual Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 093/130] target-ppc: Altivec 2.07: Add GEN_VXFORM3, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 104/130] target-ppc: Altivec 2.07: Vector Min/Max Doubleword Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 100/130] target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 101/130] target-ppc: Altivec 2.07: vmuluw Instruction, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 102/130] target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 120/130] target-ppc/translate.c: Use ULL suffix for 64 bit constants,
Alexander Graf <=
- [Qemu-ppc] [PULL 106/130] target-ppc: Altivec 2.07: Unpack Signed Word Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 109/130] target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 108/130] target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and Shifts, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 103/130] target-ppc: Altivec 2.07: Vector Population Count Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 098/130] target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 107/130] target-ppc: Altivec 2.07: Vector Merge Instructions, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 110/130] target-ppc: Altivec 2.07: Quadword Addition and Subtracation, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 126/130] target-ppc: Change the hpte store API, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 127/130] target-ppc: Update ppc_hash64_store_hpte to support updating in-kernel htab, Alexander Graf, 2014/03/06
- [Qemu-ppc] [PULL 128/130] target-ppc: Introduce hypervisor call H_GET_TCE, Alexander Graf, 2014/03/06