[Qemu-ppc] [V2 PATCH 12/18] softfloat: Fix float64_to_uint32_round_to_zero

[Tom Musta]

The float64_to_uint32_round_to_zero routine is incorrect.

For example, the following test pattern:

    425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38

will erroneously set the inexact flag.

This patch re-implements the routine to temporarily force the
rounding mode and use the float64_to_uint32 routine.

Signed-off-by: Tom Musta <address@hidden>
---
 fpu/softfloat.c |   10 ++++------
 1 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 6a8b6f5..052c202 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -6594,15 +6594,13 @@ uint32 float64_to_uint32( float64 a STATUS_PARAM )
 
 uint32 float64_to_uint32_round_to_zero( float64 a STATUS_PARAM )
 {
-    int64_t v;
+    uint64_t v;
     uint32 res;
 
-    v = float64_to_int64_round_to_zero(a STATUS_VAR);
-    if (v < 0) {
-        res = 0;
-        float_raise( float_flag_invalid STATUS_VAR);
-    } else if (v > 0xffffffff) {
+    v = float64_to_uint64_round_to_zero(a STATUS_VAR);
+    if (v > 0xffffffff) {
         res = 0xffffffff;
+        STATUS(float_exception_flags) &= ~float_flag_inexact;
         float_raise( float_flag_invalid STATUS_VAR);
     } else {
         res = v;
-- 
1.7.1