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From: | Richard Henderson |
Subject: | Re: [Qemu-ppc] [Qemu-devel] [PATCH 12/14] VSX Stage 4: Add Scalar SP Fused Multiply-Adds |
Date: | Fri, 08 Nov 2013 09:28:26 +1000 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.0 |
On 11/07/2013 06:31 AM, Tom Musta wrote: > } > \ > + > \ > + if (r2sp) { > \ > + float32 tmp32 = float64_to_float32(xt_out.fld[i], > \ > + &env->fp_status); > \ > + xt_out.fld[i] = float32_to_float64(tmp32, &env->fp_status); > \ > + } > \ > + > \ You can't get correct results for a single-precision fma from a double-precision fma and merely rounding the results. See e.g. glibc's sysdeps/ieee754/dbl-64/s_fmaf.c. r~
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