qemu-ppc
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-ppc] [PATCH v2] e600 core for MPC86xx processors


From: Julio Guerra
Subject: Re: [Qemu-ppc] [PATCH v2] e600 core for MPC86xx processors
Date: Fri, 21 Jun 2013 14:01:48 +0200

2013/6/21 Alexander Graf <address@hidden>:
>
> On 26.05.2013, at 19:41, Julio Guerra wrote:
>
>> MPC86xx processors are based on the e600 core, which is not the case
>> in qemu where it is based on the 7400 processor.
>>
>> This patch creates the e600 core and instantiates the MPC86xx
>> processors based on it. Therefore, adding the high BATs and the SPRG
>> 4..7 registers, which are e600-specific [1].
>>
>> This allows to define the MPC8610 processor too and my program running
>> on a real MPC8610 target is now able to run on qemu :)
>>
>> [1] http://cache.freescale.com/files/32bit/doc/ref_manual/E600CORERM.pdf
>>
>> Signed-off-by: Julio Guerra <address@hidden>
>
> Thanks, applied to ppc-next.
>

I just retested this patch and I noticed the `handle_mmu_fault`
default value introduced by recent A. Farber patches on the CPU
definitions is wrong with the selected memory model. Thus qemu
complains about the MMU model.

The following is missing in e600 CPU definition:
> #if defined(CONFIG_SOFTMMU)
>     ppc->handle_mmu_fault = ppc_hash32_handle_mmu_fault;
> #endif

Can you correct it or should I resend a patch (v3 or just the previous
three lines) ?

--
Julio Guerra



reply via email to

[Prev in Thread] Current Thread [Next in Thread]