On 22.12.2012, at 03:15, Scott Wood wrote:
> Critical interrupts on FSL MPIC are not supposed to pay
> attention to priority, IACK, EOI, etc. On the currently modeled
> version it's not supposed to pay attention to the mask bit either.
>
> Also reorganize to make it easier to implement newer FSL MPIC
models,
> which encode interrupt level information differently and support
> mcheck as well as crit, and to reduce problems for later patches
> in this set.
>
> Still missing is the ability to lower the CINT signal to the core,
> as IACK/EOI is not used. This will come with general
IRQ-source-driven
> lowering in the next patch.
>
> New state is added which is not serialized, but instead is
recomputed
> in openpic_load() by calling the appropriate write_IRQreg function.
> This should have the side effect of causing the IRQ outputs to be
> raised appropriately on load, which was missing.
>
> The serialization format is altered by swapping ivpr and idr (we'd
like
> IDR to be restored before we run the IVPR logic), and moving
interrupts
> to the end (so that other state has been restored by the time we
run the
> IDR/IVPR logic. Serialization for this driver is not yet in a state
> where backwards compatibility is reasonable (assuming it works at
all),
> and the current serialization format was not built for
extensibility.
>
> Signed-off-by: Scott Wood <address@hidden>
Thanks, applied to ppc-next (with adjustments).