Re: [Qemu-ppc] [PATCH 2/2] PPC: Fix TLB invalidation bug within the PPC interrupt handler.

[David Gibson]

On Fri, Mar 23, 2012 at 11:34:43AM -0500, Scott Wood wrote:
> On 03/22/2012 09:20 PM, David Gibson wrote:
> > On Thu, Mar 22, 2012 at 03:37:49PM -0500, Scott Wood wrote:
> >> I wonder why this is done again at the end of the function for booke
> >> (without regard to MSR bits).  It seems like the above flush should
> >> handle booke as well as classic -- though the comment should be
> >> "changed/deactivated" rather than "disactivated", since on booke those
> >> bits just switch from one translation to another.
> > 
> > Right, which means I don't think this test will work as is for BookE.
> > There, we'd need to check for any change in the IS/DS bits instead of
> > just testing presence of IR/DR bits.
> 
> IS/DS always clear on exceptions, just like IR/DR on classic, so it's
> the same thing.

Right, but the semantics are different, which might change when tlb
flushes are needed.

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson