Re: [Qemu-ppc] [PATCH 2/2] PPC: Fix TLB invalidation bug within the PPC interrupt handler.

[Mark Cave-Ayland]

On 23/03/12 02:20, David Gibson wrote:

> > I wonder why this is done again at the end of the function for booke
> > (without regard to MSR bits).  It seems like the above flush should
> > handle booke as well as classic -- though the comment should be
> > "changed/deactivated" rather than "disactivated", since on booke those
> > bits just switch from one translation to another.
>
> Right, which means I don't think this test will work as is for BookE.
> There, we'd need to check for any change in the IS/DS bits instead of
> just testing presence of IR/DR bits.

Are these still MSR bits? I don't see any MSR_IS/MSR_DS defines in 
target-ppc/cpu.h?


ATB,

Mark.