[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PATCH 30/64] MPC8544DS: Generate CPU nodes on init
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 30/64] MPC8544DS: Generate CPU nodes on init |
Date: |
Thu, 6 Oct 2011 10:05:32 +0200 |
With this patch, we generate CPU nodes in the machine initialization, giving
us the freedom to generate as many nodes as we want and as the machine supports,
but only those.
This is a first step towards a much cleaner device tree generation
infrastructure, where we would not require precompiled dtb blobs anymore.
Signed-off-by: Alexander Graf <address@hidden>
---
hw/ppce500_mpc8544ds.c | 46 +++++++++++++++++++++++++++++++++-------------
1 files changed, 33 insertions(+), 13 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index a3e1ce4..dfa8034 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -123,23 +123,43 @@ static int mpc8544_load_device_tree(CPUState *env,
hypercall, sizeof(hypercall));
}
- for (i = 0; i < smp_cpus; i++) {
+ /* We need to generate the cpu nodes in reverse order, so Linux can pick
+ the first node as boot node and be happy */
+ for (i = smp_cpus - 1; i >= 0; i--) {
char cpu_name[128];
- uint64_t cpu_release_addr[] = {
- cpu_to_be64(MPC8544_SPIN_BASE + (i * 0x20))
- };
+ uint64_t cpu_release_addr = cpu_to_be64(MPC8544_SPIN_BASE + (i *
0x20));
+
+ for (env = first_cpu; env != NULL; env = env->next_cpu) {
+ if (env->cpu_index == i) {
+ break;
+ }
+ }
+
+ if (!env) {
+ continue;
+ }
- snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,address@hidden",
i);
+ snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,address@hidden",
env->cpu_index);
+ qemu_devtree_add_subnode(fdt, cpu_name);
qemu_devtree_setprop_cell(fdt, cpu_name, "clock-frequency",
clock_freq);
qemu_devtree_setprop_cell(fdt, cpu_name, "timebase-frequency",
tb_freq);
- qemu_devtree_setprop(fdt, cpu_name, "cpu-release-addr",
- cpu_release_addr, sizeof(cpu_release_addr));
- }
-
- for (i = smp_cpus; i < 32; i++) {
- char cpu_name[128];
- snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,address@hidden",
i);
- qemu_devtree_nop_node(fdt, cpu_name);
+ qemu_devtree_setprop_string(fdt, cpu_name, "device_type", "cpu");
+ qemu_devtree_setprop_cell(fdt, cpu_name, "reg", env->cpu_index);
+ qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-line-size",
+ env->dcache_line_size);
+ qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-line-size",
+ env->icache_line_size);
+ qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000);
+ qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000);
+ qemu_devtree_setprop_cell(fdt, cpu_name, "bus-frequency", 0);
+ if (env->cpu_index) {
+ qemu_devtree_setprop_string(fdt, cpu_name, "status", "disabled");
+ qemu_devtree_setprop_string(fdt, cpu_name, "enable-method",
"spin-table");
+ qemu_devtree_setprop(fdt, cpu_name, "cpu-release-addr",
+ &cpu_release_addr, sizeof(cpu_release_addr));
+ } else {
+ qemu_devtree_setprop_string(fdt, cpu_name, "status", "okay");
+ }
}
ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
--
1.6.0.2
- [Qemu-ppc] [PATCH 38/64] pseries: interrupt controller should not have a 'reg' property, (continued)
- [Qemu-ppc] [PATCH 38/64] pseries: interrupt controller should not have a 'reg' property, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 18/64] PPC: E500: Remove mpc8544_copy_soc_cell, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 17/64] PPC: E500: Use generic kvm function for freq, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 16/64] PPC: KVM: Add generic function to read host clockfreq, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 31/64] PPC: E500: Bump CPU count to 15, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 05/64] PPC: Add CPU local MMIO regions to MPIC, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 29/64] MPC8544DS: Remove CPU nodes, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 09/64] PPC: MPIC: Remove read functionality for WO registers, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 10/64] PPC: MPIC: Fix CI bit definitions, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 01/64] spapr: proper qdevification, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 30/64] MPC8544DS: Generate CPU nodes on init,
Alexander Graf <=
- [Qemu-ppc] [PATCH 19/64] PPC: bamboo: Use kvm api for freq and clock frequencies, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 13/64] PPC: E500: Generate IRQ lines for many CPUs, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 03/64] spapr: make irq customizable via qdev, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 11/64] PPC: Bump MPIC up to 32 supported CPUs, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 36/64] pseries: Bugfixes for interrupt numbering in XICS code, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 37/64] pseries: Add a phandle to the xicp interrupt controller device tree node, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 44/64] kvm: ppc: booke206: use MMU API, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 33/64] KVM: update kernel headers, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 56/64] PPC: Fix heathrow PIC to use little endian MMIO, Alexander Graf, 2011/10/06
- [Qemu-ppc] [PATCH 14/64] device tree: add nop_node, Alexander Graf, 2011/10/06