[User Question - help] Arm Generic Timer Events not registered

[cy8berpunk]

Hello Qemu people,
I’m new to mailing lists and qemu so I hope I’m right here.

For my current project I try to get the arm generic timer working. I’m on the 
virt-machine with an a53 in el1 and ttbr1 kernel space. 
But although ISR_EL1 and cntp_ctl_el0 indicate that the timer is triggering and 
an IRQ is pending, my interrupt vector function is not getting called(ESR/FAR 
have always been empty.).
In order to insure that the exceptions vector table works, I tested it with svc 
exceptions, which work as expected.
Now in order to confirm that my writes to registers are successful, I enabled 
the trace events.
For the GIC that looks like the following(my codes enables the gic/gicd, sets 
the target and priority to 0 and enables irq30):
```
gic_dist_write dist write at 0x00000000 size 4: 0x00000000
gic_dist_write dist write at 0x00000180 size 4: 0xffffffff
gic_dist_write dist write at 0x00000280 size 4: 0xffffffff
gic_dist_write dist write at 0x00000184 size 4: 0xffffffff
gic_dist_write dist write at 0x00000284 size 4: 0xffffffff
gic_dist_write dist write at 0x00000188 size 4: 0xffffffff
gic_dist_write dist write at 0x00000288 size 4: 0xffffffff
gic_dist_write dist write at 0x00000400 size 4: 0xffffffff
gic_dist_write dist write at 0x00000404 size 4: 0xffffffff
gic_dist_write dist write at 0x00000408 size 4: 0xffffffff
gic_dist_write dist write at 0x0000040c size 4: 0xffffffff
gic_dist_write dist write at 0x00000410 size 4: 0xffffffff
gic_dist_write dist write at 0x00000414 size 4: 0xffffffff
gic_dist_write dist write at 0x00000418 size 4: 0xffffffff
gic_dist_write dist write at 0x0000041c size 4: 0xffffffff
gic_dist_write dist write at 0x00000420 size 4: 0xffffffff
gic_dist_write dist write at 0x00000424 size 4: 0xffffffff
gic_dist_write dist write at 0x00000428 size 4: 0xffffffff
gic_dist_write dist write at 0x0000042c size 4: 0xffffffff
gic_dist_write dist write at 0x00000430 size 4: 0xffffffff
gic_dist_write dist write at 0x00000434 size 4: 0xffffffff
gic_dist_write dist write at 0x00000438 size 4: 0xffffffff
gic_dist_write dist write at 0x0000043c size 4: 0xffffffff
gic_dist_write dist write at 0x00000440 size 4: 0xffffffff
gic_dist_write dist write at 0x00000810 size 4: 0x01010101
gic_dist_write dist write at 0x00000814 size 4: 0x01010101
gic_dist_write dist write at 0x00000818 size 4: 0x01010101
gic_dist_write dist write at 0x0000081c size 4: 0x01010101
gic_dist_write dist write at 0x00000820 size 4: 0x01010101
gic_dist_write dist write at 0x00000824 size 4: 0x01010101
gic_dist_write dist write at 0x00000828 size 4: 0x01010101
gic_dist_write dist write at 0x0000082c size 4: 0x01010101
gic_dist_write dist write at 0x00000830 size 4: 0x01010101
gic_dist_write dist write at 0x00000834 size 4: 0x01010101
gic_dist_write dist write at 0x00000838 size 4: 0x01010101
gic_dist_write dist write at 0x0000083c size 4: 0x01010101
gic_dist_write dist write at 0x00000840 size 4: 0x01010101
gic_dist_write dist write at 0x00000c08 size 4: 0x00000000
gic_dist_write dist write at 0x00000c0c size 4: 0x00000000
gic_dist_write dist write at 0x00000c10 size 4: 0x00000000
gic_dist_write dist write at 0x00000000 size 4: 0x00000001
gic_dist_read dist read at 0x00000c04 size 4: 0x00000000
gic_dist_write dist write at 0x00000c04 size 4: 0x20000000
gic_dist_read dist read at 0x0000041c size 4: 0xffffffff
gic_dist_write dist write at 0x0000041c size 4: 0xffffffff
gic_dist_read dist read at 0x0000081c size 4: 0x00000000
gic_dist_write dist write at 0x0000081c size 4: 0x00010000
gic_dist_read dist read at 0x00000100 size 4: 0x0000ffff
gic_dist_write dist write at 0x00000100 size 4: 0xc0000000
gic_enable_irq irq 30 enabled
gic_enable_irq irq 31 enabled
gic_set_irq irq 30 level 1 cpumask 0x1 target 0x1
gic_update_bestirq cpu 0 irq 30 priority 255 cpu priority mask 255 cpu running 
priority 256
```
So I think it’s relatively safe to assume that the gic is correctly configured. 

I’m enabling the timer with the following code:

```
asm volatile ("mrs x1, CNTFRQ_EL0”);
asm volatile ("mov x4, #2");
asm volatile ("mul x3, x1, x4");
asm volatile ("msr CNTP_TVAL_EL0, x3");

asm volatile ("mrs x2, cntvct_el0");
asm volatile ("add x3, x1, x2");

asm volatile ("mov x0, 1");
asm volatile ("msr cntp_ctl_el0, x0”);
```
But for some reason I can’t get tracing events.
I tried the following events:
- trace_arm_gt_tval_write
- trace_arm_gt_cval_write
- trace_arm_gt_ctl_write
- trace_arm_gt_recalc
But although I’m clearly accessing the timer regs(checked with gdb), no events 
are triggered. 
So it’s two things, the exception vector not getting called and the tracing 
events not working. 
Does somebody have advice? I’m thankful for any input!

Best regards Paul!