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Re: MIPS32 release 2 Instructions

From: Philippe Mathieu-Daudé
Subject: Re: MIPS32 release 2 Instructions
Date: Wed, 17 Mar 2021 17:07:01 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.0

On 3/17/21 12:20 PM, prashant chaturvedi wrote:
> Hello all,
> I'm trying execute a mips32r2 , little endian binary on qemu and the
> instructions like enable interrupt(EI) and Pair upper Lower(PUL.PS
> <http://PUL.PS>) are not supported by qemu as it gives "Illegal
> Instruction" error.

PUL.PS is microMIPS32, not MIPS32r2.

QEMU emulates microMIPS32 with the M14K/M14Kc CPUs.

This instruction is available since 2010:

commit 3c824109da076d2a1df4b798f9df81b385131f92
Author: Nathan Froyd <froydnj@codesourcery.com>
Date:   Tue Jun 8 13:29:59 2010 -0700

    target-mips: microMIPS ASE support

> I'm really confused with this, Those instructions are part of the ISA,
> then why am I getting this error? Is there something that I'm missing?
> someway that i can enable execution of those instructions? Any help
> would be appreciated.
> Thank you all in advance!

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