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RE: What does soft-mmu mean? What happens when we set MMU registers? (aa

From: ckim
Subject: RE: What does soft-mmu mean? What happens when we set MMU registers? (aarch64)
Date: Tue, 9 Mar 2021 09:42:18 +0900

Hello, Peter Maydell,
Thanks again for the clarifications.
I checked I was at EL3 (read currentel), the sctlr_el3 and sctlr_el1 was at 
initialized value, 
but sctlr_el2 was zero. I'll look through the SMMU document and sctlr_el3 
related contents.
Thank you!
Best regards,
Chan Kim

> -----Original Message-----
> From: Peter Maydell <peter.maydell@linaro.org>
> Sent: Monday, March 8, 2021 10:47 PM
> To: Chan Kim <ckim@etri.re.kr>
> Cc: qemu-discuss <qemu-discuss@nongnu.org>
> Subject: Re: What does soft-mmu mean? What happens when we set MMU
> registers? (aarch64)
> On Mon, 8 Mar 2021 at 13:34, <ckim@etri.re.kr> wrote:
> >
> > As far as I understand, in arm architecture, access to SMMU is done by
> > system registers,
> >
> > not by reading or writing to certain registers located in certain
> addresses.
> Your understanding is incorrect. The SMMUv3 is programmed via a set of
> memory-mapped registers (and by setting up data structures in guest memory
> and telling the SMMU about them by writing to its registers). (See the
> SMMUv3 architecture specification, chapter 6.)
> > And I launched qemu using this command :
> >
> > ${QEMU_DIR}/qemu-system-aarch64 -machine
> > type=virt,gic-version=3,secure=true,virtualization=true -cpu
> > cortex-a72
> >
> > -nographic -smp 1 -m 2048 -drive
> > if=pflash,file=pflash.img,format=raw,readonly=on
> >
> > I found setting sctlr_el3 caused exception (for smmu setting), trying
> > to find what is the difference that makes this error (the baremetal
> > code I run on qemu runs ok in rtl sim),
> SCTLR_EL3 is not related to the SMMU at all.
> The MMU and the SMMU are entirely different. The MMU is part of the CPU
> and is used to control whether CPU memory accesses are allowed and how
> their addresses are translated to physical addresses. The SMMU is what
> Intel call an 'iommu', and controls whether device DMA accesses are
> allowed and how their addresses are translated.
> > I remembered qemu I run is something called ‘soft-mmu’, so maybe I
> shouldn’t set the mmu registers..
> "softmmu" just means "we emulate the MMU in software". It is the opposite
> of "user-mode", where we don't emulate the MMU at all (and just run one
> guest Linux binary).
> > In codes for SoCs with real mmu, how does the codes work when it sets
> MMU related registers?
> This works because QEMU emulates the MMU.
> If you're getting an exception when you try to write to SCTLR_EL3, you
> should check whether (for instance) you're actually executing at EL3.
> QEMU's debug logging options might help in working out why an exception
> was taken.
> thanks
> -- PMM

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