[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-discuss] 答复: 答复: signal SIGILL, Illegal instruction for "mtc0 zer
[Qemu-discuss] 答复: 答复: signal SIGILL, Illegal instruction for "mtc0 zero, c0_cause"
Sat, 22 Apr 2017 06:57:13 +0000
>On 18 April 2017 at 02:34, Zhangwen (Esan) <address@hidden> wrote:
>> Yeah, I am running a single binary under qemu's user emulation and the
>> binary is compiled with mips-sde-gcc.
>> The command line is as follows:
>> ###:~/qemu/$ qemu-mips -cpu 34Kf ./test I understand your meanings but
>> how to running it? Using qemu-system-mips or Adding MIPS kernel or some
>> binary? For example:
>> - qemu-system-mips -kernel xxxx ...
> (a) you're building your binary wrong -- if you just build a Linux binary
> for MIPS it ought to work under qemu-mips or (b) you really do want to build
> a "bare metal" binary -- this is more complicated and you need to make sure
> it's built correctly for the board you're using with qemu-system-mips and so
> on, and you need to find out how to run a bare metal binary with that board
> (which is probably -kernel but could be something else: I'm not a MIPS
Thanks for your help.
I have another question to ask and hope your help. I remove the mtc0
instructions in crt0.S and then build a binary with mips-sde-gcc. Finally, some
memory addresses can not be accessed, for example,
The starting address is 0x8000 and the bss_end address is 0x1bd00, but 0x1c108
can not be accessed.
I have tried it in arm32 and xtensa ARCH and the address is almost the same to
mips, but the result is OK.
Also, I have checked the link script and found no result.
So, Have qemu restricted the mips or arm or else ARCH accessed addresses? What