[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-discuss] Basic Question on QEMU Internals

From: Peter Maydell
Subject: Re: [Qemu-discuss] Basic Question on QEMU Internals
Date: Thu, 26 Mar 2015 22:40:37 +0000

On 26 March 2015 at 21:24, Patrick <address@hidden> wrote:
> "That affects the fine detail of exactly how we translate the guest code..."
> I see that the list of x86 cpus includes Nehalem, Westmere, Penryn, and many
> others. I was somewhat interested in what QEMU is doing differently when
> emulating, for example, a Nehalem versus a Westmere. From looking at
> target-i386/cpu.c, it appears that it is because the two microarchitectures
> have slight differences in the instructions they support (e.g. Westmere
> having the AES extensions), even though they are both x86.

Yes. Also we will end up reporting different ID register
values for cpuid instructions (though that is done by
a runtime helper function behaving differently rather
than by generating different code at translate time).

> I was curious about whether QEMU was doing anything that reflected
> differences between the two with respect to their hardware for executing
> standard x86 instructions, for example. From what you've said so far, I'm
> suspecting that it doesn't. That is what I had thought before, but when I
> saw the ability to specify different microarchitectures on the command line,
> I became curious.

No, we don't try to emulate CPUs at a microarchitectural level.

Bear in mind that the long list of x86 CPUs supported is partly
there for when you're using QEMU with KVM (in that mode we
don't emulate the CPU at all but let the hardware virtualization
support do the work for us). If we didn't have KVM support we
probably wouldn't bother to support so many CPUs when for
emulation they're nearly identical.

-- PMM

reply via email to

[Prev in Thread] Current Thread [Next in Thread]