[Qemu-discuss] Implementing processor specific opcode Geode lx

[Patrick Schlieker]

Hello qemuers,

 

I'm trying to get qemu/SerialICE working with the AMD Geode Lx processor.

My current problem is implementing the opcode for the SMINT instruction which basically stores the current state of the cpu in a header and initiates System Management Mode.

Writing the data to the SMM memory space at 0x80400000 specified by an MSR fails for some reason. I can't figure out why. Especially since qemu/SerialICE writes to the same address space in the instructions before that.

 

I would really appreciate it if you could have a look at my code (only a few lines)  and tell me if you know the reason behind this. Did I use the wrong store-function or did I do some rookie mistakes?

 

Heres my code so far: http://pastebin.com/nqwzrB2W

 

and heres the excerpt of the qemu debug log: http://pastebin.com/4gCuzxN1

 

What surprises me about the the debug log is that the SMM flag is shown as '0' although i set the corresponding hflags and registers in the helper function.

 

Thank you for your help :)

 

 

Geode data book, implementation of SMINT instruction is on page 648: http://support.amd.com/it/Embedded_TechDocs/33234d_lx_ds.pdf