Re: [PATCH v3 3/4] hw/mips/loongson3_virt: Wire up loongson_ipi device

[Philippe Mathieu-Daudé]

On 5/6/24 04:15, Jiaxun Yang wrote:
> Wire up loongson_ipi device for loongson3_virt machine, so we
> can have SMP support for TCG backend as well.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
>   hw/mips/Kconfig           |  1 +
>   hw/mips/loongson3_bootp.c |  2 --
>   hw/mips/loongson3_bootp.h |  3 +++
>   hw/mips/loongson3_virt.c  | 39 +++++++++++++++++++++++++++++++++++++--
>   4 files changed, 41 insertions(+), 4 deletions(-)


> @@ -527,6 +531,19 @@ static void mips_loongson3_virt_init(MachineState *machine)
>       create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB);
>       create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB);
>   
> +    memory_region_init(iocsr, OBJECT(machine), "loongson3.iocsr", UINT32_MAX);
> +
> +    /* IPI controller is in kernel for KVM */
> +    if (!kvm_enabled()) {

Generically one could come with another hypervisor support, so better
to check for what you are expecting. You could see some uses of:

  if (tcg) ... else if (kvm) ... else abort().

> +        ipi = qdev_new(TYPE_LOONGSON_IPI);
> +        qdev_prop_set_uint32(ipi, "num-cpu", machine->smp.cpus);
> +        sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
> +        memory_region_add_subregion(iocsr, SMP_IPI_MAILBOX,
> +            sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0));
> +        memory_region_add_subregion(iocsr, MAIL_SEND_ADDR,
> +            sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
> +    }
> +
>       liointc = qdev_new("loongson.liointc");
>       sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc), &error_fatal);
>   
> @@ -543,6 +560,8 @@ static void mips_loongson3_virt_init(MachineState *machine)
>       clock_set_hz(cpuclk, DEF_LOONGSON3_FREQ);
>   
>       for (i = 0; i < machine->smp.cpus; i++) {
> +        int node = i / LOONGSON3_CORE_PER_NODE;
> +        int core = i % LOONGSON3_CORE_PER_NODE;
>           int ip;
>   
>           /* init CPUs */
> @@ -553,12 +572,28 @@ static void mips_loongson3_virt_init(MachineState 
> *machine)
>           cpu_mips_clock_init(cpu);
>           qemu_register_reset(main_cpu_reset, cpu);
>   
> -        if (i >= 4) {
> +        if (ipi) {
> +            hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base;
> +            base += core * 0x100;
> +            qdev_connect_gpio_out(ipi, i, cpu->env.irq[6]);
> +            sysbus_mmio_map(SYS_BUS_DEVICE(ipi), i + 2, base);
> +        }
> +
> +        if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
> +            MemoryRegion *core_iocsr = g_new(MemoryRegion, 1);
> +            g_autofree char *name = g_strdup_printf("loongson3.core%d_iocsr", 
> i);
> +            memory_region_init_alias(core_iocsr, OBJECT(cpu), name,
> +                                     iocsr, 0, UINT32_MAX);
> +            memory_region_add_subregion(&MIPS_CPU(cpu)->env.iocsr.mr,
> +                                        0, core_iocsr);
> +        }
> +
> +        if (node > 0) {
>               continue; /* Only node-0 can be connected to LIOINTC */
>           }

Pre-existing, but the logic appears clearer as:

          if (node == 0) {
>   
>           for (ip = 0; ip < 4 ; ip++) {
> -            int pin = i * 4 + ip;
> +            int pin = core * LOONGSON3_CORE_PER_NODE + ip;
>               sysbus_connect_irq(SYS_BUS_DEVICE(liointc),
>                                  pin, cpu->env.irq[ip + 2]);
>           }

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>