[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Stable-8.2.5 45/45] target/loongarch: fix a wrong print in cpu dump
From: |
Michael Tokarev |
Subject: |
[Stable-8.2.5 45/45] target/loongarch: fix a wrong print in cpu dump |
Date: |
Fri, 7 Jun 2024 22:13:04 +0300 |
From: lanyanzhi <lanyanzhi22b@ict.ac.cn>
description:
loongarch_cpu_dump_state() want to dump all loongarch cpu
state registers, but there is a tiny typographical error when
printing "PRCFG2".
Cc: qemu-stable@nongnu.org
Signed-off-by: lanyanzhi <lanyanzhi22b@ict.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240604073831.666690-1-lanyanzhi22b@ict.ac.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
(cherry picked from commit 78f932ea1f7b3b9b0ac628dc2a91281318fe51fa)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 337f04b201..6710ca0016 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -764,7 +764,7 @@ void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int
flags)
qemu_fprintf(f, "EENTRY=%016" PRIx64 "\n", env->CSR_EENTRY);
qemu_fprintf(f, "PRCFG1=%016" PRIx64 ", PRCFG2=%016" PRIx64 ","
" PRCFG3=%016" PRIx64 "\n",
- env->CSR_PRCFG1, env->CSR_PRCFG3, env->CSR_PRCFG3);
+ env->CSR_PRCFG1, env->CSR_PRCFG2, env->CSR_PRCFG3);
qemu_fprintf(f, "TLBRENTRY=%016" PRIx64 "\n", env->CSR_TLBRENTRY);
qemu_fprintf(f, "TLBRBADV=%016" PRIx64 "\n", env->CSR_TLBRBADV);
qemu_fprintf(f, "TLBRERA=%016" PRIx64 "\n", env->CSR_TLBRERA);
--
2.39.2
- [Stable-8.2.5 35/45] target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w, (continued)
- [Stable-8.2.5 35/45] target/riscv: rvv: Check single width operator for vfncvt.rod.f.f.w, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 36/45] target/riscv: rvv: Remove redudant SEW checking for vector fp narrow/widen instructions, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 37/45] target/riscv: prioritize pmp errors in raise_mmu_exception(), Michael Tokarev, 2024/06/07
- [Stable-8.2.5 38/45] target/riscv: do not set mtval2 for non guest-page faults, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 39/45] target/riscv: rvzicbo: Fixup CBO extension register calculation, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 40/45] target/riscv/kvm.c: Fix the hart bit setting of AIA, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 41/45] disas/riscv: Decode all of the pmpcfg and pmpaddr CSRs, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 42/45] target/i386: fix xsave.flat from kvm-unit-tests, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 43/45] target/i386: fix SSE and SSE2 feature check, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 44/45] ui/sdl2: Allow host to power down screen, Michael Tokarev, 2024/06/07
- [Stable-8.2.5 45/45] target/loongarch: fix a wrong print in cpu dump,
Michael Tokarev <=