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Re: [PATCH v2 0/8] hw/riscv/virt.c: aplic/imsic DT fixes
From: |
Alistair Francis |
Subject: |
Re: [PATCH v2 0/8] hw/riscv/virt.c: aplic/imsic DT fixes |
Date: |
Wed, 5 Jun 2024 10:43:40 +1000 |
On Sat, Jun 1, 2024 at 6:30 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> This is a series that is being spun from the reviews given on patch 1
> [1]. We'll fix some DT validation issues we have in the 'virt' machine
> [2] that aren't related to missing extensions in the DT spec.
>
> I'll leave to maintainers to squash the patches as they see fit. I
> split it this way to make it easier to bissect possible bugs that these
> individual changes can cause.
>
> These are the types of DT warnings solved by this series:
>
> /home/danielhb/work/qemu/riscv64_virt.dtb: aplic@d000000: $nodename:0:
> 'aplic@d000000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#
> /home/danielhb/work/qemu/riscv64_virt.dtb: aplic@d000000: compatible:0:
> 'riscv,aplic' is not one of ['qemu,aplic']
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#
> /home/danielhb/work/qemu/riscv64_virt.dtb: aplic@d000000: compatible:
> ['riscv,aplic'] is too short
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#
> /home/danielhb/work/qemu/riscv64_virt.dtb: aplic@d000000: Unevaluated
> properties are not allowed ('compatible' was unexpected)
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#
> (...)
> /home/danielhb/work/qemu/riscv64_virt.dtb: imsics@28000000: $nodename:0:
> 'imsics@28000000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
> /home/danielhb/work/qemu/riscv64_virt.dtb: imsics@28000000: compatible:0:
> 'riscv,imsics' is not one of ['qemu,imsics']
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
> /home/danielhb/work/qemu/riscv64_virt.dtb: imsics@28000000: compatible:
> ['riscv,imsics'] is too short
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
> /home/danielhb/work/qemu/riscv64_virt.dtb: imsics@28000000: '#msi-cells' is a
> required property
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
> /home/danielhb/work/qemu/riscv64_virt.dtb: imsics@28000000: Unevaluated
> properties are not allowed ('compatible' was unexpected)
> from schema $id:
> http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
>
> [3] explains how to run 'dt-validate' to reproduce them. To generate a
> 'processed schema' file what I did was:
>
> - in the Linux kernel tree, run 'make dt_binding_check'. Please note
> that this might require installation of additional python stuff
> (e.g.swig, python3-devel)
>
> - I used the generated file
> 'Documentation/devicetree/bindings/processed-schema.json'
> as a 'processed schema'.
>
> Series applicable on both master and alistair/riscv-to-apply.next.
>
> Changes from v1:
> - added patches 2 to 7 to fix the dt-validate warnings on imsics and
> aplic notes
> - v1 link:
> https://lore.kernel.org/qemu-riscv/20240530084949.761034-1-dbarboza@ventanamicro.com/
>
> [1]
> https://lore.kernel.org/qemu-riscv/20240530084949.761034-1-dbarboza@ventanamicro.com/
> [2] https://lore.kernel.org/all/20240529-rust-tile-a05517a6260f@spud/
> [3]
> https://lore.kernel.org/qemu-riscv/20240530-landed-shriek-9362981afade@spud/
>
> Daniel Henrique Barboza (8):
> hw/riscv/virt.c: add address-cells in create_fdt_one_aplic()
> hw/riscv/virt.c: add aplic nodename helper
> hw/riscv/virt.c: rename aplic nodename to 'interrupt-controller'
> hw/riscv/virt.c: aplic DT: add 'qemu,aplic' to 'compatible'
> hw/riscv/virt.c: aplic DT: rename prop to 'riscv,delegation'
> hw/riscv/virt.c: change imsic nodename to 'interrupt-controller'
> hw/riscv/virt.c: imsics DT: add 'qemu,imsics' to 'compatible'
> hw/riscv/virt.c: imsics DT: add '#msi-cells'
Thanks!
Applied to riscv-to-apply.next
Alistair
>
> hw/riscv/virt.c | 36 +++++++++++++++++++++++++++---------
> include/hw/riscv/virt.h | 1 +
> 2 files changed, 28 insertions(+), 9 deletions(-)
>
> --
> 2.45.1
>
>