[PULL 00/72] ppc-for-9.1-1 queue

[Nicholas Piggin]

This replaces the previous PR for tags/pull-ppc-for-9.1-1-20240524 note
this tag is tags/pull-ppc-for-9.1-1-20240524-1 (added -1 suffix). The
changelog and code are unchanged. Subject for BHRB patches are fixed
and trimmed for some MMU cleanup patches. So I won't re-send individual
patches to lists.

Thanks,
Nick

The following changes since commit 70581940cabcc51b329652becddfbc6a261b1b83:

  Merge tag 'pull-tcg-20240523' of https://gitlab.com/rth7680/qemu into staging 
(2024-05-23 09:47:40 -0700)

are available in the Git repository at:

  https://gitlab.com/npiggin/qemu.git tags/pull-ppc-for-9.1-1-20240524-1

for you to fetch changes up to e48fb4c590a23d81ee1d2f09ee9bcf5dd5f98e43:

  target/ppc: Remove pp_check() and reuse ppc_hash32_pp_prot() (2024-05-24 
09:43:14 +1000)

----------------------------------------------------------------

* Fix an interesting TLB invalidate race
* Implement more instructions with decodetree
* Add the POWER8/9/10 BHRB facility
* Add missing instructions, registers, SMT support
* First round of a big MMU xlate cleanup

----------------------------------------------------------------
BALATON Zoltan (33):
      target/ppc: Remove unused helper_rac()
      target/ppc: Move calculation of a value closer to its usage in booke tlb 
checks
      target/ppc: Remove unneeded local variable from booke tlb checks
      target/ppc: Simplify checking for real mode in get_physical_address_wtlb()
      target/ppc: Drop cases for unimplemented MPC8xx MMU
      target/ppc: Introduce mmu6xx_get_physical_address()
      target/ppc: Move else branch to avoid large if block in 
mmu6xx_get_physical_address()
      target/ppc: Move some debug logging in ppc6xx_tlb_check()
      target/ppc: Eliminate ret from mmu6xx_get_physical_address()
      target/ppc: Split out BookE xlate cases before checking real mode
      target/ppc: Split off real mode cases in get_physical_address_wtlb()
      target/ppc: Inline and remove check_physical()
      target/ppc: Fix misindented qemu_log_mask() calls
      target/ppc: Deindent ppc_jumbo_xlate()
      target/ppc: Replace hard coded constants in ppc_jumbo_xlate()
      target/ppc: Don't use mmu_ctx_t for mmu40x_get_physical_address()
      target/ppc: Don't use mmu_ctx_t in mmubooke_get_physical_address()
      target/ppc: Don't use mmu_ctx_t in mmubooke206_get_physical_address()
      target/ppc: Remove BookE from direct store handling
      target/ppc: Split off BookE handling from ppc_jumbo_xlate()
      target/ppc: Simplify ppc_booke_xlate() part 1
      target/ppc: Simplify ppc_booke_xlate() part 2
      target/ppc: Split off real mode handling from get_physical_address_wtlb()
      target/ppc: Split off 40x cases from ppc_jumbo_xlate()
      target/ppc: Transform ppc_jumbo_xlate() into ppc_6xx_xlate()
      target/ppc: Move mmu_ctx_t type to mmu_common.c
      target/ppc: Remove id_tlbs flag from CPU env
      target/ppc: Split off common embedded TLB init
      target/ppc/mmu-hash32.c: Drop a local variable
      target/ppc/mmu-radix64.c: Drop a local variable
      target/ppc: Add a function to check for page protection bit
      target/ppc: Move out BookE and related MMU functions from mmu_common.c
      target/ppc: Remove pp_check() and reuse ppc_hash32_pp_prot()

Chinmay Rath (13):
      target/ppc: Merge various fpu helpers
      target/ppc: Move floating-point arithmetic instructions to decodetree.
      target/ppc: Move mul{li, lw, lwo, hw, hwu} instructions to decodetree.
      target/ppc: Make divw[u] handler method decodetree compatible.
      target/ppc: Move divw[u, e, eu] instructions to decodetree.
      target/ppc: Move neg, darn, mod{sw, uw} to decodetree.
      target/ppc: Move multiply fixed-point insns (64-bit operands) to 
decodetree.
      target/ppc: Move div/mod fixed-point insns (64 bits operands) to 
decodetree.
      target/ppc: Move cmp{rb, eqb}, tw[i], td[i], isel instructions to 
decodetree.
      target/ppc: Move logical fixed-point instructions to decodetree.
      target/ppc: Move VMX storage access instructions to decodetree
      target/ppc: Move VMX integer logical instructions to decodetree.
      target/ppc: Move VMX integer max/min instructions to decodetree.

Dr. David Alan Gilbert (1):
      target/ppc: Remove unused struct 'mmu_ctx_hash32'

Glenn Miles (4):
      target/ppc: Add new hflags to support BHRB
      target/ppc: Add recording of taken branches to BHRB
      target/ppc: Add clrbhrb and mfbhrbe instructions
      target/ppc: Add migration support for BHRB

Nicholas Piggin (21):
      spapr: avoid overhead of finding vhyp class in critical operations
      ppc/spapr: Add ibm,pi-features
      target/ppc: Fix broadcast tlbie synchronisation
      tcg/cputlb: Remove non-synced variants of global TLB flushes
      tcg/cputlb: remove other-cpu capability from TLB flushing
      target/ppc: Move sync instructions to decodetree
      target/ppc: Fix embedded memory barriers
      target/ppc: Add ISA v3.1 variants of sync instruction
      target/ppc: larx/stcx generation need only apply DEF_MEMOP() once
      target/ppc: Remove redundant MEMOP_GET_SIZE macro
      target/ppc: Make checkstop actually stop the system
      target/ppc: improve checkstop logging
      target/ppc: Implement attn instruction on BookS 64-bit processors
      target/ppc: BookE DECAR SPR is 32-bit
      target/ppc: Add PPR32 SPR
      target/ppc: add helper to write per-LPAR SPRs
      target/ppc: Add SMT support to simple SPRs
      target/ppc: Add SMT support to PTCR SPR
      target/ppc: Implement LDBAR, TTR SPRs
      target/ppc: Implement SPRC/SPRD SPRs
      target/ppc: add SMT support to msgsnd broadcast

 accel/tcg/cputlb.c                             |  145 +--
 docs/devel/multi-thread-tcg.rst                |   13 +-
 hw/ppc/pegasos2.c                              |    3 +-
 hw/ppc/spapr.c                                 |   28 +
 include/exec/exec-all.h                        |   97 +-
 target/ppc/cpu.h                               |   64 +-
 target/ppc/cpu_init.c                          |  235 +++--
 target/ppc/excp_helper.c                       |  134 ++-
 target/ppc/fpu_helper.c                        |  235 ++---
 target/ppc/helper.h                            |   98 +-
 target/ppc/helper_regs.c                       |   40 +-
 target/ppc/insn32.decode                       |  204 ++++
 target/ppc/int_helper.c                        |   24 +-
 target/ppc/internal.h                          |   40 +-
 target/ppc/kvm.c                               |    4 +-
 target/ppc/machine.c                           |   23 +-
 target/ppc/mem_helper.c                        |   12 +-
 target/ppc/meson.build                         |    1 +
 target/ppc/misc_helper.c                       |  132 ++-
 target/ppc/mmu-book3s-v3.h                     |    4 +-
 target/ppc/mmu-booke.c                         |  531 +++++++++++
 target/ppc/mmu-booke.h                         |   17 +
 target/ppc/mmu-hash32.c                        |   60 +-
 target/ppc/mmu-hash32.h                        |   45 +
 target/ppc/mmu-hash64.c                        |   18 +-
 target/ppc/mmu-radix64.c                       |    9 +-
 target/ppc/mmu_common.c                        | 1197 ++++++------------------
 target/ppc/mmu_helper.c                        |   39 +-
 target/ppc/power8-pmu-regs.c.inc               |    5 +
 target/ppc/power8-pmu.c                        |   48 +-
 target/ppc/power8-pmu.h                        |   11 +-
 target/ppc/spr_common.h                        |    8 +
 target/ppc/translate.c                         | 1151 ++++-------------------
 target/ppc/translate/bhrb-impl.c.inc           |   43 +
 target/ppc/translate/branch-impl.c.inc         |    2 +-
 target/ppc/translate/fixedpoint-impl.c.inc     |  727 ++++++++++++++
 target/ppc/translate/fp-impl.c.inc             |  285 +++---
 target/ppc/translate/fp-ops.c.inc              |   31 -
 target/ppc/translate/misc-impl.c.inc           |  157 ++++
 target/ppc/translate/processor-ctrl-impl.c.inc |    2 +-
 target/ppc/translate/storage-ctrl-impl.c.inc   |    7 +
 target/ppc/translate/vmx-impl.c.inc            |  280 +++---
 target/ppc/translate/vmx-ops.c.inc             |   50 -
 43 files changed, 3267 insertions(+), 2992 deletions(-)
 create mode 100644 target/ppc/mmu-booke.c
 create mode 100644 target/ppc/mmu-booke.h
 create mode 100644 target/ppc/translate/bhrb-impl.c.inc
 create mode 100644 target/ppc/translate/misc-impl.c.inc