Re: [PATCH 08/41] target/sparc: Perform DFPREG/QFPREG in decodetree

[Philippe Mathieu-Daudé]

On 2/3/24 06:15, Richard Henderson wrote:
> Form the proper register decoding from the start.
>
> Because we're removing the translation from the inner-most
> gen_load_fpr_* and gen_store_fpr_* routines, this must be
> done for all insns at once.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/sparc/translate.c  |  18 ++--
>   target/sparc/insns.decode | 220 +++++++++++++++++++++++---------------
>   2 files changed, 138 insertions(+), 100 deletions(-)
>
> diff --git a/target/sparc/translate.c b/target/sparc/translate.c
> index 6a6c259b06..97a5c636d2 100644
> --- a/target/sparc/translate.c
> +++ b/target/sparc/translate.c
> @@ -241,34 +241,30 @@ static void gen_store_fpr_F(DisasContext *dc, unsigned 
> int dst, TCGv_i32 v)
>   
>   static TCGv_i64 gen_load_fpr_D(DisasContext *dc, unsigned int src)
>   {
> -    src = DFPREG(src);
>       return cpu_fpr[src / 2];
>   }

Optionally squash removal of the macros:

-- >8 --
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 0efc561d4c..f59d08e9e4 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -193,10 +193,2 @@ typedef struct DisasContext {

-#ifdef TARGET_SPARC64
-#define DFPREG(r) (((r & 1) << 5) | (r & 0x1e))
-#define QFPREG(r) (((r & 1) << 5) | (r & 0x1c))
-#else
-#define DFPREG(r) (r & 0x1e)
-#define QFPREG(r) (r & 0x1c)
-#endif
-
 #define UA2005_HTRAP_MASK 0xff
@@ -2083,3 +2075,7 @@ static int extract_dfpreg(DisasContext *dc, int x)
 {
-    return DFPREG(x);
+    int r = x & 0x1c;
+#ifdef TARGET_SPARC64
+    r |= (x & 1) << 5;
+#endif
+    return r;
 }
@@ -2088,3 +2084,7 @@ static int extract_qfpreg(DisasContext *dc, int x)
 {
-    return QFPREG(x);
+    int r = x & 0x1e;
+#ifdef TARGET_SPARC64
+    r |= (x & 1) << 5;
+#endif
+    return r;
 }
---

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>