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[PULL 17/61] target/riscv: remove riscv_cpu_options[]
From: |
Alistair Francis |
Subject: |
[PULL 17/61] target/riscv: remove riscv_cpu_options[] |
Date: |
Fri, 9 Feb 2024 20:57:29 +1000 |
From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
The array is empty and can be removed.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Tested-by: Vladimir Isaev <vladimir.isaev@syntacore.com>
tested-by tags added, rebased with Alistair's riscv-to-apply.next.
Message-ID: <20240112140201.127083-6-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/cpu.h | 1 -
target/riscv/cpu.c | 5 -----
target/riscv/kvm/kvm-cpu.c | 9 ---------
target/riscv/tcg/tcg-cpu.c | 4 ----
4 files changed, 19 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 3e342a5ae5..a744b2372b 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -788,7 +788,6 @@ extern const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[];
extern const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[];
extern const RISCVCPUMultiExtConfig riscv_cpu_named_features[];
extern const RISCVCPUMultiExtConfig riscv_cpu_deprecated_exts[];
-extern Property riscv_cpu_options[];
typedef struct isa_ext_data {
const char *name;
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index da8d19c790..f0e3cfda33 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1985,11 +1985,6 @@ static const PropertyInfo prop_cboz_blksize = {
.set = prop_cboz_blksize_set,
};
-Property riscv_cpu_options[] = {
-
- DEFINE_PROP_END_OF_LIST(),
-};
-
/*
* RVA22U64 defines some 'named features' or 'synthetic extensions'
* that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 748a690b73..4dec91740b 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -1527,19 +1527,10 @@ void kvm_riscv_aia_create(MachineState *machine,
uint64_t group_shift,
static void kvm_cpu_instance_init(CPUState *cs)
{
Object *obj = OBJECT(RISCV_CPU(cs));
- DeviceState *dev = DEVICE(obj);
riscv_init_kvm_registers(obj);
kvm_riscv_add_cpu_user_properties(obj);
-
- for (Property *prop = riscv_cpu_options; prop && prop->name; prop++) {
- /* Check if we have a specific KVM handler for the option */
- if (object_property_find(obj, prop->name)) {
- continue;
- }
- qdev_property_add_static(dev, prop);
- }
}
/*
diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c
index 8afc501a67..b580b83f9a 100644
--- a/target/riscv/tcg/tcg-cpu.c
+++ b/target/riscv/tcg/tcg-cpu.c
@@ -1301,10 +1301,6 @@ static void riscv_cpu_add_user_properties(Object *obj)
riscv_cpu_add_multiext_prop_array(obj, riscv_cpu_deprecated_exts);
riscv_cpu_add_profiles(obj);
-
- for (Property *prop = riscv_cpu_options; prop && prop->name; prop++) {
- qdev_property_add_static(DEVICE(obj), prop);
- }
}
/*
--
2.43.0
- [PULL 07/61] target/riscv: move 'mmu' to riscv_cpu_properties[], (continued)
- [PULL 07/61] target/riscv: move 'mmu' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 08/61] target/riscv: move 'pmp' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 09/61] target/riscv: rework 'priv_spec', Alistair Francis, 2024/02/09
- [PULL 10/61] target/riscv: rework 'vext_spec', Alistair Francis, 2024/02/09
- [PULL 11/61] target/riscv: move 'vlen' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 12/61] target/riscv: move 'elen' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 14/61] target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 13/61] target/riscv: create finalize_features() for KVM, Alistair Francis, 2024/02/09
- [PULL 15/61] target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 16/61] target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 17/61] target/riscv: remove riscv_cpu_options[],
Alistair Francis <=
- [PULL 18/61] target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 19/61] target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 20/61] target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[], Alistair Francis, 2024/02/09
- [PULL 21/61] target/riscv: Implement optional CSR mcontext of debug Sdtrig extension, Alistair Francis, 2024/02/09
- [PULL 22/61] target/riscv: add 'vlenb' field in cpu->cfg, Alistair Francis, 2024/02/09
- [PULL 23/61] target/riscv/csr.c: use 'vlenb' instead of 'vlen', Alistair Francis, 2024/02/09
- [PULL 25/61] target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenb, Alistair Francis, 2024/02/09
- [PULL 24/61] target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen', Alistair Francis, 2024/02/09
- [PULL 26/61] target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb', Alistair Francis, 2024/02/09
- [PULL 27/61] target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb', Alistair Francis, 2024/02/09