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[PATCH v3 09/38] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S}
From: |
Richard Henderson |
Subject: |
[PATCH v3 09/38] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S} |
Date: |
Thu, 11 Jan 2024 09:43:39 +1100 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231028194522.245170-33-richard.henderson@linaro.org>
[PMD: Split from bigger patch, part 2/2]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231108205247.83234-2-philmd@linaro.org>
---
target/alpha/translate.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 89e630a7cc..49e6a7b62d 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -482,10 +482,10 @@ static DisasJumpType gen_bcond_internal(DisasContext
*ctx, TCGCond cond,
}
static DisasJumpType gen_bcond(DisasContext *ctx, TCGCond cond, int ra,
- int32_t disp, int mask)
+ int32_t disp)
{
return gen_bcond_internal(ctx, cond, load_gpr(ctx, ra),
- mask, disp);
+ is_tst_cond(cond), disp);
}
/* Fold -0.0 for comparison with COND. */
@@ -2820,35 +2820,35 @@ static DisasJumpType translate_one(DisasContext *ctx,
uint32_t insn)
break;
case 0x38:
/* BLBC */
- ret = gen_bcond(ctx, TCG_COND_EQ, ra, disp21, 1);
+ ret = gen_bcond(ctx, TCG_COND_TSTEQ, ra, disp21);
break;
case 0x39:
/* BEQ */
- ret = gen_bcond(ctx, TCG_COND_EQ, ra, disp21, 0);
+ ret = gen_bcond(ctx, TCG_COND_EQ, ra, disp21);
break;
case 0x3A:
/* BLT */
- ret = gen_bcond(ctx, TCG_COND_LT, ra, disp21, 0);
+ ret = gen_bcond(ctx, TCG_COND_LT, ra, disp21);
break;
case 0x3B:
/* BLE */
- ret = gen_bcond(ctx, TCG_COND_LE, ra, disp21, 0);
+ ret = gen_bcond(ctx, TCG_COND_LE, ra, disp21);
break;
case 0x3C:
/* BLBS */
- ret = gen_bcond(ctx, TCG_COND_NE, ra, disp21, 1);
+ ret = gen_bcond(ctx, TCG_COND_TSTNE, ra, disp21);
break;
case 0x3D:
/* BNE */
- ret = gen_bcond(ctx, TCG_COND_NE, ra, disp21, 0);
+ ret = gen_bcond(ctx, TCG_COND_NE, ra, disp21);
break;
case 0x3E:
/* BGE */
- ret = gen_bcond(ctx, TCG_COND_GE, ra, disp21, 0);
+ ret = gen_bcond(ctx, TCG_COND_GE, ra, disp21);
break;
case 0x3F:
/* BGT */
- ret = gen_bcond(ctx, TCG_COND_GT, ra, disp21, 0);
+ ret = gen_bcond(ctx, TCG_COND_GT, ra, disp21);
break;
invalid_opc:
ret = gen_invalid(ctx);
--
2.34.1
- Re: [PATCH v3 02/38] tcg: Introduce TCG_TARGET_HAS_tst, (continued)
- [PATCH v3 03/38] tcg/optimize: Split out arg_is_const_val, Richard Henderson, 2024/01/10
- [PATCH v3 04/38] tcg/optimize: Split out do_constant_folding_cond1, Richard Henderson, 2024/01/10
- [PATCH v3 05/38] tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2, Richard Henderson, 2024/01/10
- [PATCH v3 06/38] tcg/optimize: Handle TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 07/38] tcg/optimize: Lower TCG_COND_TST{EQ, NE} if unsupported, Richard Henderson, 2024/01/10
- [PATCH v3 08/38] target/alpha: Pass immediate value to gen_bcond_internal(), Richard Henderson, 2024/01/10
- [PATCH v3 10/38] target/alpha: Use TCG_COND_TST{EQ, NE} for CMOVLB{C, S}, Richard Henderson, 2024/01/10
- [PATCH v3 09/38] target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S},
Richard Henderson <=
- [PATCH v3 11/38] target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero, Richard Henderson, 2024/01/10
- [PATCH v3 14/38] target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM}, Richard Henderson, 2024/01/10
- [PATCH v3 16/38] tcg: Add TCGConst argument to tcg_target_const_match, Richard Henderson, 2024/01/10
- [PATCH v3 18/38] tcg/aarch64: Generate TBZ, TBNZ, Richard Henderson, 2024/01/10
- [PATCH v3 13/38] target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc, Richard Henderson, 2024/01/10