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[PATCH 06/22] target/i386: document more deviations from the manual
From: |
Paolo Bonzini |
Subject: |
[PATCH 06/22] target/i386: document more deviations from the manual |
Date: |
Fri, 22 Dec 2023 19:15:47 +0100 |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/decode-new.c.inc | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 2bdbb1bba0f..232c6a45c96 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -26,6 +26,13 @@
* size (X86_SIZE_*) codes used in the manual. There are a few differences
* though.
*
+ * Operand sizes
+ * -------------
+ *
+ * The manual lists d64 ("cannot encode 32-bit size in 64-bit mode") and f64
+ * ("cannot encode 16-bit or 32-bit size in 64-bit mode") as modifiers of the
+ * "v" or "z" sizes. The decoder simply makes them separate operand sizes.
+ *
* Vector operands
* ---------------
*
@@ -44,6 +51,11 @@
* if the difference is expressed via prefixes. Individual instructions
* are separated by prefix in the generator functions.
*
+ * There is a custom size "xh" used to address half of a SSE/AVX operand.
+ * This points to a 64-bit operand for SSE operations, 128-bit operand
+ * for 256-bit AVX operands, etc. It is used for conversion operations
+ * such as VCVTPH2PS or VCVTSS2SD.
+ *
* There are a couple cases in which instructions (e.g. MOVD) write the
* whole XMM or MM register but are established incorrectly in the manual
* as "d" or "q". These have to be fixed for the decoder to work correctly.
--
2.43.0
- Re: [PATCH 04/22] target/i386: remove unnecessary truncations, (continued)
- [PATCH 08/22] target/i386: avoid trunc and ext for MULX and RORX, Paolo Bonzini, 2023/12/22
- [PATCH 11/22] target/i386: do not decode string source/destination into decode->mem, Paolo Bonzini, 2023/12/22
- [PATCH 12/22] target/i386: do not clobber A0 in POP translation, Paolo Bonzini, 2023/12/22
- [PATCH 14/22] target/i386: split eflags computation out of gen_compute_eflags, Paolo Bonzini, 2023/12/22
- [PATCH 18/22] target/i386: prepare for implementation of STOS/SCAS in new decoder, Paolo Bonzini, 2023/12/22
- [PATCH 06/22] target/i386: document more deviations from the manual,
Paolo Bonzini <=
- [PATCH 10/22] target/i386: add X86_SPECIALs for MOVSX and MOVZX, Paolo Bonzini, 2023/12/22
- [PATCH 13/22] target/i386: do not clobber T0 on string operations, Paolo Bonzini, 2023/12/22
- [PATCH 16/22] target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0, Paolo Bonzini, 2023/12/22
- [PATCH 15/22] target/i386: do not use s->tmp4 for push, Paolo Bonzini, 2023/12/22
- [PATCH 19/22] target/i386: move operand load and writeback out of gen_cmovcc1, Paolo Bonzini, 2023/12/22